IBM System/7 Functional Characteristics - All about the IBM 1130 ...

Shift Right Logical (PSRL)0 5 8 11 15Op codeRModCount0 0 0 1 0iX X XI I0 1 0iXXXXXlit'1 0-7 4 or 5XAll 16 bits in the index register (R), or the accumulator if R=000, are shifted rightby the number of bits specified in the count field.Vacated high-order bits are set to 0's. All bits shifted out of the low-order position(bit 15) are lost.The shift count field can specify any decimal value from 0 to 16. Shift counts greaterthan 16 are invalid and cause a program check interruption. A shift count of 16 setsthe entire contents of the R register to a 0 value. A shift count of 0 is valid andserves a useful purpose. Although no shifting takes place, this is a simple method ofsetting the result indicators to reflect the current contents of the R register.The carry and overflow indicators are not changed. The result indicators are changedto reflect the final contents of the R register. For a shift count greater than 0, theresult-positive indicator is always set on.Example:Assume a right shift of two bits in the accumulator0 5 8 15PSRL instructionOp code R Mod Count0 0 0 1 0 0 0 0 0 1 0 0 10 0 1 0ilii II II III!1 0 4 2Accumulator0 15Original value0 shifted inAfter first shift0 shifted inAfter second shiftProcessor Instructions 4-27