IBM System/7 Functional Characteristics - All about the IBM 1130 ...

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111111•1111111111■ IllO (OR) instruction A-15, 4-20odd parity, processor module 2-601A (old instruction address) 3-7OM (OR to mask) instruction A-16, 4-49operating and programming restrictions, printer 17-28operating temperature restriction 1-7operation code (Op code) field 4-5operation end interruption, 1130 16-3operation modes (see mode)operation register (OP) 2-2, 2-12operations, diskdescription 15-7introduction 1-5module selection from operator console 5-6read data 15-7seek 15-8write data 15-7operator consoledisplay area 5-3IPL source 5-6main functions 5-3security 5-3setting-up for data entry 5-6operator controls, diskDRIVE switch 15-3FILE READY indicator 15-3FILE WRITE switch 15-3IPL switch 15-3operator console module selection 5-6operator stationcheck status bit 4-62command summary B-1functional description 9-2introduction 1-2operators panel, 2502 17-16OR (OR register) instruction A-16, 4-22OR instruction A-15, 4-20OR to mask instruction A-16, 3-5, 4-49original 'good' track 15-26oscillator accuracy 6-2output belt image 17-20overflow (OVRFLW) light 5-5overflow indicator 2-13, 4-56overload (5012 Multifunction Module)analog input control model B 13-5analog input control model C 13-9overrun 1-4, 4-60, 15-6, 15-12OVRFLW (overflow) light 5-5PA (add) instruction A-1, 4-14pad characters 8-4.1, 8-4.2PAI (add immediate) instruction A-2, 4-15PAR (add register) instruction A-2, 4-17parity 2-6parity, start byte, 2790 13-29, 14-16parity, 1130 16-2parity error indicators 5-3PAS (add to storage and skip) instruction A-3, 4-39PB (branch) instruction A-6, 4-29PBAL (branch and link) instruction A-6, 4-30PBALL (branch and link long) instruction A-7, 4-32PBC (branch conditional) instruction A-8, 4-34PCK (program check) indicator lights 5-4PCR (complement register) instruction A-9, 4-19pending interruption requests, halt I/O command 4-58pending interruptions 3-2PI (see process interrupt)PIIB (inspect IAR backup) instruction A-11, 4-44PIO (execute I/O) instruction A-10, 4-55PIR (interchange register) instruction A-11, 4-43PL (load accumulator) instruction A-12, 4-8PLEX (level exit) instruction A-12, 4-51PLI (load immediate) instruction A-14, 4-10X-10 GA34-0003PLPS (load processor status) instruction A-15, 4-44PLR (load from register) instruction A-13, 4-42PLXL (load index long) instruction A-14, 4-11PLZ (load and zero) instruction A-13, 4-9PN (AND) instruction A-4, 4-20PNM (AND to mask) instruction A-5, 4-49PNR (AND register) instruction A-5, 4-22PO (OR) instruction A-15, 4-20POM (OR to mask) instruction A-16, 4-49POR (OR register) instruction A-16, 4-22positive displacement 4-6positive numbers 2-8positive result indicator 2-13power failure warning 1-7 2-11, 3-8, 3-11, 3-14power switches and indicators 5-9, 5-10, 94power switches and indicators, printer 17-28power switches and indicators, 2502 17-16power/thermal warning interruptions to 1130 System 16-3precision E-1prepare I/O command 3-3, 4-57preparing timers for interruptions 6-2print and punch command 9-8print only command 9-7printer belt positions 17-20.1printer, operator station 9-2printer, 5024 (see line printer, 5024)priorityclass interruptions 3-9interruptions 3-2displacement tables 3-7program processing 3-2wait state 3-2level mask, class interruptions 3-5, 3-9levels 3-2assignment, disk 15-6assignment, prepare I/O command 4-57initial program load (ACCA) 7-14interruptions to System/7, 1130 164introduction 1-2option 15-19process interrupt, digital inputdescription 13-15, 14-4digital input exception 13-16equal comparison 13-19, 14-8forced interruption control 13-19, 14-8interruption request 13-15, 144introduction 14programmed selection of comparison 13-19, 14-8read digital input reference registercommand 13-18, 14-7read digital input register command 13-17, 14-6read ISW 13-20, 14-9read/reset digital input register command 13-17, 14-6set digital input interrupt controlcommand 13-19, 14-8set digital input latch control command 13-18, 14-7set digital input reference registercommand 13-17, 14-6set test signal command 13-19, 14-8under program control 13-15, 14-4unequal comparison 13-19, 14-8processorinstructions 4-2module, set interrupt function 4-58status information 444processor loading factor 15-8processor modulecycle steal 1-3, 1-4, 2-3data flow 2-2data formats 2-7functional description 2-2introduction 1-2parity 2-6program indicators 2-12registers 2-9
processor module (continued)states 2-4storage addresses 2-9processor registers 2-9processor statesload 2-5manual wait 2-5stop 2-4wait 2-5processor status, class interruptions 3-9processor status word (PSW) C-3program check (PCK) indicator lights 5-4program check during effective address generation 4-6program check interruption 3-9, 3-10program-controlled bell, operator station 9-2program execution, IPL, operator station 9-5program indicators 2-12carry 2-12overflow 2-13result 2-13testing 2-12program load (IPL) key 5-10program restrictions in System/7 16-2programmed range selection(see also convert analog input command)multifunction moduleanalog input control Model B 134analog input control Model C 13-95014 Model B1 10-25014 Model Cl 11-25014 Model D1 12-2programmed selection of comparison, digitalinput 13-19, 14-8programming and storage requirements, 2790Control 13-26, 14-13programming cautionstransmit control command, ACCA 7-8turn on motor command 9-7programming restrictionsbinary data mode (ACCA) 7-13interruptions 3-2operator station 9-2reserved storage locations 3-6protect key 2-13, 2-14, 4-53, 4-54PS (subtract) instruction A-24, 4-15PSKC (skip conditional) instruction A-21, 4-38PSLC (shift left circular) instruction A-19, 4-26PSLL (shift left logical) instruction A-20PSLL (shift left logical) instruction 4-25PSLM (sense level and mask) instruction A-19, 4-50PSR (subtract register) instruction A-24, 4-18PSRA (shift right arithmetic) instruction A-20, 4-28PSRL (shift right logical) instruction A-21, 4-27PST (store accumulator) instruction A-22, 4-12PSTP (stop) instruction A-22, 4-51PSTR (store to register) instruction A-23, 4-41PSTX (store index) instruction A-22, 4-13PSW (processor status word) C-3pulse, external sychronization (see input pulse)pulse counter 13-3, 13-25, 14-2, 14-12punch only command 9-8punch switch, 5028 Operator Station 9-5PX (exclusive OR) instruction A-9, 4-21PXR (exclusive OR register) instruction A-10, 4-23quadrant 14-3queuing interruption requests 3-4R register 4-5range bits5012 Multifunction Module Model Al 13-6, 13-10range bits (continued)5014 Model B1 10-35014 Model Cl 11-35014 Model D1 12-3rate control switch 5-8read, ACCAcharacter command 7-9ISW command 7-10read, initiate IOCC (1130 Host Attachment) 16-6read, processor instructionsdirect control channel status word command 4-61DSW command 4-59ID command 4-62ID extension command 4-63ISW command 4-60ISWEX command 4-61read, timer command 6-3read, 5012 Multifunction Module Model AlADC commandanalog input control model B 13-7analog input control model C 13-11ADC extended precision commandanalog input control model B 13-8analog input control model C 13-12address command 13-42analog output holding register command 13-24analog output register command 13-24and convert ADC command 13-13command acknowledge response, 2790 system 13-32commands, 2790 system 13-32control and data command 1342data acknowledge response, 2790 system 13-32data command, 2790 system 13-32data request response, 2790 system 13-32digital input reference register command 13-17digital input register command 13-17digital output group register command 13-22digital output holding register command 13-22DSW command 13-3end acknowledge response, 2790 system 13-32end command, 2790 system 13-32end request response, 2790 system 13-32ISW commandanalog input control model B 13-8analog input control model C 13-14digital input 13-202790 Control 1344null acknowledge response, 2790 system 13-32null command, 2790 system 13-32read/reset digital input register command 13-17request response, 2790 system 13-32responses, 2790 system 13-32read, 5014 Analog Input Module Model B1ADC command 10-4ADC extended precision command 10-5DSW command 10-6ISW command 10-6read, 5014 Analog Input Module Model ClADC command 114ADC extended precision command 11-5and convert ADC command 11-6DSW command 11-7ISW command 11-7read, 5014 Analog Input Module Model D1ADC command 124DSW command 12-5read, 5022 Disk Storage Moduledata command 15-14data overrun condition 15-14data-service interruption request 15-15data modecommand 15-14initialize command 15-14Index X-11
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GA34-0003-7File No. S7-00IBM System
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ContentsPrefaceChapter 1. Introduct
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Flagging 15-26Track Initialization
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PrefaceThis reference manual is a s
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IntroductionCHAPTER CONTENTSSystem/
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Figure 1-1. IBM 5028 Operator Stati
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• One or two analog output points
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Power Failure and Thermal WarningPo
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IBM 5010 Processor ModuleCHAPTER CO
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StorageProcessorAACycleSteal/ Featu
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The processor does not recognize in
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DATA FORMATSInput/output data can b
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The absolute form can be obtained i
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Accumulators (ACC 0 to ACC 3)Page o
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Overflow IndicatorThe overflow indi
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System/7 InterruptionsCHAPTER CONTE
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Level 1interruptionprocessing'.ros
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Interruption Mask Register and Summ
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Page of GA34-0003-6,-7As Updated Au
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The accumulator associated with the
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Page of GA34-0003-6, -7As Updated A
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The summary mask isturned on; sampl
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Processor InstructionsCHAPTER CONTE
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InstructionMnemonic'OperationcodeLo
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' rrrI !Mil,. '11111E1 luluINSTRUCT
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"" ',Pli iI 1114111111111111 111111
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Load Immediate (PLI)0 5 8 15Op code
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Store Accumulator (PST)0 5 8 15Op c
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vow wow. •1•01111111111111111
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NMI INNI 1111=111111 IM11111■1111
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11111 !III VIII I 1101 1,411111111,
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I i 1111111'1Np■I0111m PIP ,ili11
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Example:Word in accumulator 0110 11
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Exclusive ORing occurs only between
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Shift Left Circular (PSLC)0 5 8 11
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Shift Right Arithmetic (PSRA)0 5 8
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Example:PB instruction(R = 110 spec
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Branch and Link Long (PBALL)0 5 8 1
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Branch Conditional (PBC►0 5 8 9 1
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Branch and Unmask Long (BUL) (5010
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Skip Conditional (PSKC)0 5 8 9 15Op
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Example:0 5 8 15PAS instruction(loc
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Load from Register (PLR)0 5 8 15Op
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Load Processor Status (PLPS)0 5 8 1
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Write IAR Backup (WIB) (5010 Proces
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Store Indicators (STI) (5010 Proces
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Executing the OR-to-mask instructio
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the process position. If the system
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Read Protect Key (RPK)0 5 8 11 16 2
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Module address field:Module address
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11111E111111111 M11111111•11111 1
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1111111111111111111111■11•11111
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Sixteen bits of additional module i
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1 REG 1---LEVEL0 10 0 2 1 20 0 0 03
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CTL CHK (Control Check) LightThis l
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1111■111111,11,11N I IIIADDRESS L
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CHECK CONTROL SwitchThis three-posi
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START KeyPressing the start key cau
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The processor module contains two 1
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6-4 GA34-0003II I 1 1 III 111 1111
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.11.1111111.111 MP I 111.10114P III
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1111 Minn. 11111111R !VW IMF" !PFLI
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The ACCA must be selected in order
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111.1111 111111 N uData and control
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I II III• 1111111111111111 1•11
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Significant Bits Meaning7* Data set
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I■ 0=11 1111111 MEM11 1111111111
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". — •• 11•111•MI !IF lim
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V IIF 1,1 NM IICONTROL CHARACTERS A
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Character SynchronizationCharacter
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Bit 1-Reserved.Bit 2-Transmit Opera
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1,114plilloi 1110 1111 1111.11 VI P
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1 1 - 1111=111111111 111M 1111 111
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The 5028 Operator Station (Figure 9
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Thickness Paper - .004 + .0003" (0,
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Character bit position 84 Tape move
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If the operator station motor is no
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Feed Tape and Print0 5 8 11 16 20 2
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Read 1SW0 5 8 11 16 20 26 31Op code
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The 5014 Analog Input Module Model
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Convert Analog Input with External
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Read ISW0 5 8 11 16 20 26 31Op code
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10-8 GA34-0003
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11111811111111.1.1.14.111.1111I II
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" 11, 141MINMIIIIF I WPM P IP !! 11
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Read and Convert ADC0 5 8 11 16 20
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Device Status Word (DSW): The 16 bi
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1411111111,1111111111n 111The 5014
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Convert Analog Input with External
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12-6 GA34-0003
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The 5012 Multifunction Module Model
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MODULE DEVICE ADDRESSESANALOG INPUT
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The range bits (RRR) in the control
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H1111111111111 1111.111111HIVRead A
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I/0 CommandsThe prepare I/O and hal
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Data stored in the register can hav
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If a particular amplifier gain was
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' 14 111•141111111111111011114111
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Read Digital Input Reference Regist
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Digital Input Groups Without Proces
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CIA ^iN1i Ma IIl AMINNNP u 11.!..11
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Write Analog Output Holding Registe
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1111111■11111111101=11111.1111111
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=111111111111111111 1 11 1 11111111
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DataThe data byte contains either d
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Read CommandsAll read commands are
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Write Null Acknowledge: This code (
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Area Station Local I/O Guidance Cha
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2791/2793 Adapter Critical timingIn
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BeginDSC* 05Write(AS enters data mo
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oww1111111111111111111111111,1,, V
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Bit 15 in the R register can be set
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The 5013 Digital I/O Module Model A
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The prepare I/O command is used as
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Read Digital Input RegisterO 5 8 11
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Set Digital Input Interrupt Control
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DIGITAL OUTPUT CONTROLThe Digital O
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The 2792 Remote Communications Cont
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Data TransmissionInformation is tra
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The functions of the five bytes in
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Code nameHexBit patternResponse Com
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Read End Acknowledge: This code (he
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Begin Diagnostic: This code (hexade
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Command SequencesThe 2790 Control m
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An area station requiring service l
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Set Diagnostic Mode0 5 8 11 16 20 2
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14-32 GA34-0003
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FUNCTIONAL DESCRIPTIONThe IBM 5022
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FILE ORGANIZATIONEach surface of ea
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Sector Identifier FormatEach identi
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If fewer than 128 words are to be t
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When the IPL operation starts, the
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Recalibrate Operation: A recalibrat
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1111 11 I 111111111111WRead Initial
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If an error is detected during a da
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None of the data read is transferre
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Error and Status ConditionsErrors d
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Significant Bits Meaning5* No recor
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Significant Bits Meaning3 Seek chec
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FLAGGINGThe condition of a track su
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Track Initialization ProceduresThe
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Bit 5—No Record FoundIt should be
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15-32 GA34-0003
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I III 1111111111111111111111111111
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Interruptions to System/7The progra
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Initiate Read0 16 21 24 31111111Add
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Device Status Word (DSW): The 16-bi
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16-10 GA34-0003
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The IBM 5024 I/O Attachment Enclosu
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III 1111•1111111111•1111111 III
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11111 1 11•1111111111111111111111
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Reset 5024The reset 5024 resets the
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2502 Card Reader Translate TableA 2
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I/O Transfer BlockThe address of th
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Status Word 1.0 152502 status buffe
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Status Word 2.0 15Status word 1% St
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1 1 111111111111111111111111111•1
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IMP P 1111,1111.11,11311111 I MP 11
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11 11 1111111111 1 1111111111111111
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algaaaagIrlug",',/"'", BeltPosition
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• Disable Attention Interrupt 110
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Status Word 1.0 15aStatus word 1•
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Status Word 2.15Status word 1N+1Res
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Interrupt PresentationThe printer a
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17-30 GA34-0003
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Add immediateMnemonicExecutiontime
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Alter storage key (provided only wi
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BranchMnemonicExecutiont i me (ns)O
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Branch conditionalMnemonicExecution
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Exclusive OR registertMnemonicExecu
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Level exitMnemonicExecutiontime (ns
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Load immediateMnemonicExecutiontime
Page 356 and 357: OR registerMnemonicExecutiontime (n
Page 358 and 359: Read protect key (provided only wit
Page 360 and 361: 1111■11111■111111111 1 11111111
Page 362 and 363: StopMnemonicExecutiontime Ins)Op co
Page 364 and 365: SubtractMnemonicExecutiontime (ns)O
Page 366 and 367: A-26 GA34-0003
Page 368 and 369: PIO instruction Function ModifierDe
Page 370 and 371: 1111111■111111PIO instruction Fun
Page 372 and 373: Valid responses to 2790 read comman
Page 374 and 375: Interrupt status wordsDevice0 1 2 3
Page 376 and 377: Device status word (2502, 5024 with
Page 378 and 379: 11.1 11111 11110•11111111111.1111
Page 380 and 381: 5028ConsoleShift/ 5028BSCAACCAContr
Page 382 and 383: 5028ConsoleShift/ 5028BSCAACCAContr
Page 384 and 385: triNtitTIBitRanges and bit values (
Page 386 and 387: .••■• III II III 11111.•
Page 388 and 389: E-6 GA34-0003
Page 390 and 391: Verifydata beforewrite analogoutput
Page 392 and 393: Prepare I/OSet referenceregisterYes
Page 394 and 395: F-6 GA34-0003IIII•1111■•■
Page 396 and 397: G-2 GA34-0003
Page 398 and 399: analog signal resolution (continued
Page 400 and 401: cycle steal feature data flow 2-3cy
Page 402 and 403: forced interruption control, digita
Page 404 and 405: initial program load (IPL) to Syste
Page 408 and 409: ead, 5022 Disk Storage Module (cont
Page 410 and 411: 11111111111111111■1 1111111 11111
Page 412: X-16 GA34-0003
Page 416 and 417: GA34-0003-7Your comments, please ..
Page 419 and 420: I 111111111111111.1 I MEM II 1 1111
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