IBM System/7 Functional Characteristics - All about the IBM 1130 ...

Interruption Mask Register and Summary MaskTo give the user some control over the automatic interruption system, a 4-bit interruptionmask register is provided. Bit positions 0 to 3 in the mask register correspond to prioritylevels 0 to 3, respectively.If the appropriate bit in the mask register is set on, devices assigned to thatpriority level can interrupt the system. Setting the bit off disables the level so thatno interruptions are honored on that level. The interruption mask register can be usedto further modify the sequence in which the priority interruptions are serviced byenabling or disabling interruptions on one or more priority levels.The contents of the mask register can be modified or examined by three instructions;AND to mask, OR to mask, and sense level and mask, as explained in Chapter 4, "ProcessorInstructions."For additional control-there is a summary mask function that, when turned on, inhibitsall four priority level interruption and also power/thermal warning interruptions. Turningon the summary mask function does not disturb the contents of the interruption maskregister; the summary mask simply has precedence over the contents.The summary mask function is turned on by any of the following:1. Executing the supervisor call instruction2. Executing the sense level and mask instruction with bit 11 of the instruction on3. A machine check or program check class interruption4. A power/thermal warning class interruption that occurs when the summary mask isoff.The summary mask function is turned off by any of the following:1. Executing the AND to mask instruction. (If the contents of the interruption maskregister are not to be disturbed, the register specified by the instruction must havebits 0-3 set to 1111.)2. Executing the OR to mask instruction. (If the contents of the interruption maskregister are not to be disturbed, the register specified by the instruction must havebits 0-3 set to 0000.)3. Executing the branch and unmask long instruction (processor module Model E only).4. A system reset or power-on reset.System/7 Interruptions 3-5