IBM System/7 Functional Characteristics - All about the IBM 1130 ...

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Branch conditionalMnemonicExecutiontime (ns)Op code R Condition bits Hex equivalent Description of instruction[NBC 400** 01000 000* XXXX XXXX 4 0 X X Branch conditional to location at EA (Addr)[P] BC 400" 01000 001 XXXX XXXX 4 1 X X Branch conditional to location at EA (XR1)[P] BC 400" 01000 010 XXXX XXXX 4 2 X X Branch conditional to location at EA (XR2)[P] BC 400" 01000 011 XXXX XXXX 4 3 X X Branch conditional to location at EA (XR3)[P] BC 400** 01000 100 XXXX XXXX 4 4 X X Branch conditional to location at EA (XR4)[P] BC 400** 01000 101 XXXX XXXX 4 5 X X Branch conditional to location at EX (X115)[P] BC 400" 01000 110 XXXX XXXX 46 X X Branch conditional to location at EA (XR6)[P1 BC 400" 01000 111 XXXX XXXX 4 7 X X Branch conditional to location at EA (XR7)*This is a two-word instruction; the second word contains th branch-to address."If no branch is taken, BC execution time = 400 nanoseconds. It is 800 nanoseconds if the branch is taken.Condition bits for BC instructionBitMeaning or condition tested8 Overflow save flag9 Carry and overflow indicators both off (condition code 0)10 Result-zero indicator on11 Result-negative indicator on12 Result-positive indicator on13 Result-even indicator on14 Carry indicator off15 Overflow indicator offSee key to symbols on page A-1A-8 GA34-0003
Complement registerMnemonicExecutiontime (ns)Op code R Modifier Hex equivalent Description of instruction[P] CR 400 11111 000 0000 1000 F 8 0 8 Complement contents of Acc[P] CR 400 11111 001 0000 1000 F 9 0 8 Complement contents of X R1[P] CR 400 11111 010 0000 1000 F A 0 8 Complement contents of XR2[P] CR 400 11111 011 0000 1000 F B 0 8 Complement contents of XR 3[P] CR 400 11111 100 0000 1000 F C 0 8 Complement contents of X R4[P] CR 400 11111 101 0000 1000 F D 0 8 Complement contents of XR5[P] CR 400 11111 110 0000 1000 F E 0 8 Complement contents of XR 6[P] CR 400 11111 111 0000 1000 F F 0 8 Complement contents of X R7Exclusive ORMnemonicExecutiontime (ns)Op code R Displacement Hex equivalent Description of instruction[P] X 800 11110 000 XXXX XXXX FOXX Exclusive OR contents at EA (IAR+Disp) with Acc[P] X 800 11110 001 XXXX XXXX F 1 X X Exclusive OR contents at EA (X R 1+Disp) with Acc[P] X 800 11110 010 XXXX XXXX F 2 X X Exclusive OR contents at EA (X R 2+Disp) with Acc[P] X 800 11110 011 XXXX XXXX F 3 X X Exclusive OR contents at EA (X R3+D isp) with Acc[P] X 800 11110 100 XXXX XXXX F 4 X X Exclusive OR contents at EA (XR4+Disp) with Acc[P] X 800 11110 101 XXXX XXXX F 5 X X Exclusive OR contents at EA (XR5+Disp) with Acc[P] X 800 11110 110 XXXX XXXX F 6 X X Exclusive OR contents at EA (XR6+Disp) with Acc[P] X 800 11110 111 XXXX XXXX F 7 X X Exclusive OR contents at EA (XR7+Disp) with AccSee key to symbols on page A-1System/7 Instruction Set A-9
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GA34-0003-7File No. S7-00IBM System
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ContentsPrefaceChapter 1. Introduct
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Flagging 15-26Track Initialization
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PrefaceThis reference manual is a s
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IntroductionCHAPTER CONTENTSSystem/
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Figure 1-1. IBM 5028 Operator Stati
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• One or two analog output points
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Power Failure and Thermal WarningPo
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IBM 5010 Processor ModuleCHAPTER CO
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StorageProcessorAACycleSteal/ Featu
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The processor does not recognize in
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DATA FORMATSInput/output data can b
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The absolute form can be obtained i
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Accumulators (ACC 0 to ACC 3)Page o
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Overflow IndicatorThe overflow indi
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System/7 InterruptionsCHAPTER CONTE
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Level 1interruptionprocessing'.ros
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Interruption Mask Register and Summ
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Page of GA34-0003-6,-7As Updated Au
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The accumulator associated with the
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Page of GA34-0003-6, -7As Updated A
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The summary mask isturned on; sampl
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Processor InstructionsCHAPTER CONTE
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InstructionMnemonic'OperationcodeLo
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' rrrI !Mil,. '11111E1 luluINSTRUCT
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"" ',Pli iI 1114111111111111 111111
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Load Immediate (PLI)0 5 8 15Op code
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Store Accumulator (PST)0 5 8 15Op c
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vow wow. •1•01111111111111111
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NMI INNI 1111=111111 IM11111■1111
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11111 !III VIII I 1101 1,411111111,
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I i 1111111'1Np■I0111m PIP ,ili11
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Example:Word in accumulator 0110 11
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Exclusive ORing occurs only between
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Shift Left Circular (PSLC)0 5 8 11
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Shift Right Arithmetic (PSRA)0 5 8
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Example:PB instruction(R = 110 spec
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Branch and Link Long (PBALL)0 5 8 1
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Branch Conditional (PBC►0 5 8 9 1
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Branch and Unmask Long (BUL) (5010
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Skip Conditional (PSKC)0 5 8 9 15Op
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Example:0 5 8 15PAS instruction(loc
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Load from Register (PLR)0 5 8 15Op
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Load Processor Status (PLPS)0 5 8 1
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Write IAR Backup (WIB) (5010 Proces
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Store Indicators (STI) (5010 Proces
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Executing the OR-to-mask instructio
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the process position. If the system
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Read Protect Key (RPK)0 5 8 11 16 2
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Module address field:Module address
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11111E111111111 M11111111•11111 1
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1111111111111111111111■11•11111
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Sixteen bits of additional module i
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1 REG 1---LEVEL0 10 0 2 1 20 0 0 03
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CTL CHK (Control Check) LightThis l
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1111■111111,11,11N I IIIADDRESS L
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CHECK CONTROL SwitchThis three-posi
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START KeyPressing the start key cau
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The processor module contains two 1
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6-4 GA34-0003II I 1 1 III 111 1111
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.11.1111111.111 MP I 111.10114P III
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1111 Minn. 11111111R !VW IMF" !PFLI
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The ACCA must be selected in order
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111.1111 111111 N uData and control
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I II III• 1111111111111111 1•11
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Significant Bits Meaning7* Data set
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I■ 0=11 1111111 MEM11 1111111111
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". — •• 11•111•MI !IF lim
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V IIF 1,1 NM IICONTROL CHARACTERS A
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Character SynchronizationCharacter
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Bit 1-Reserved.Bit 2-Transmit Opera
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1,114plilloi 1110 1111 1111.11 VI P
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1 1 - 1111=111111111 111M 1111 111
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The 5028 Operator Station (Figure 9
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Thickness Paper - .004 + .0003" (0,
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Character bit position 84 Tape move
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If the operator station motor is no
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Feed Tape and Print0 5 8 11 16 20 2
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Read 1SW0 5 8 11 16 20 26 31Op code
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The 5014 Analog Input Module Model
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Convert Analog Input with External
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Read ISW0 5 8 11 16 20 26 31Op code
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10-8 GA34-0003
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11111811111111.1.1.14.111.1111I II
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" 11, 141MINMIIIIF I WPM P IP !! 11
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Read and Convert ADC0 5 8 11 16 20
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Device Status Word (DSW): The 16 bi
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1411111111,1111111111n 111The 5014
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Convert Analog Input with External
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12-6 GA34-0003
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The 5012 Multifunction Module Model
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MODULE DEVICE ADDRESSESANALOG INPUT
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The range bits (RRR) in the control
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H1111111111111 1111.111111HIVRead A
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I/0 CommandsThe prepare I/O and hal
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Data stored in the register can hav
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If a particular amplifier gain was
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' 14 111•141111111111111011114111
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Read Digital Input Reference Regist
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Digital Input Groups Without Proces
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CIA ^iN1i Ma IIl AMINNNP u 11.!..11
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Write Analog Output Holding Registe
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1111111■11111111101=11111.1111111
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=111111111111111111 1 11 1 11111111
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DataThe data byte contains either d
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Read CommandsAll read commands are
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Write Null Acknowledge: This code (
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Area Station Local I/O Guidance Cha
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2791/2793 Adapter Critical timingIn
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BeginDSC* 05Write(AS enters data mo
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oww1111111111111111111111111,1,, V
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Bit 15 in the R register can be set
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The 5013 Digital I/O Module Model A
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The prepare I/O command is used as
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Read Digital Input RegisterO 5 8 11
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Set Digital Input Interrupt Control
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DIGITAL OUTPUT CONTROLThe Digital O
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The 2792 Remote Communications Cont
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Data TransmissionInformation is tra
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The functions of the five bytes in
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Code nameHexBit patternResponse Com
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Read End Acknowledge: This code (he
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Begin Diagnostic: This code (hexade
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Command SequencesThe 2790 Control m
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An area station requiring service l
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Set Diagnostic Mode0 5 8 11 16 20 2
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14-32 GA34-0003
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FUNCTIONAL DESCRIPTIONThe IBM 5022
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FILE ORGANIZATIONEach surface of ea
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Sector Identifier FormatEach identi
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If fewer than 128 words are to be t
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When the IPL operation starts, the
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Recalibrate Operation: A recalibrat
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1111 11 I 111111111111WRead Initial
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If an error is detected during a da
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None of the data read is transferre
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Error and Status ConditionsErrors d
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Significant Bits Meaning5* No recor
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Significant Bits Meaning3 Seek chec
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FLAGGINGThe condition of a track su
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Track Initialization ProceduresThe
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Bit 5—No Record FoundIt should be
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15-32 GA34-0003
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Page 300 and 301: Interruptions to System/7The progra
Page 302 and 303: Initiate Read0 16 21 24 31111111Add
Page 304 and 305: Device Status Word (DSW): The 16-bi
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Page 308 and 309: The IBM 5024 I/O Attachment Enclosu
Page 310 and 311: III 1111•1111111111•1111111 III
Page 312 and 313: 11111 1 11•1111111111111111111111
Page 314 and 315: Reset 5024The reset 5024 resets the
Page 316 and 317: 2502 Card Reader Translate TableA 2
Page 318 and 319: I/O Transfer BlockThe address of th
Page 320 and 321: Status Word 1.0 152502 status buffe
Page 322 and 323: Status Word 2.0 15Status word 1% St
Page 324 and 325: 1 1 111111111111111111111111111•1
Page 326 and 327: IMP P 1111,1111.11,11311111 I MP 11
Page 328 and 329: 11 11 1111111111 1 1111111111111111
Page 330 and 331: algaaaagIrlug",',/"'", BeltPosition
Page 332 and 333: • Disable Attention Interrupt 110
Page 334 and 335: Status Word 1.0 15aStatus word 1•
Page 336 and 337: Status Word 2.15Status word 1N+1Res
Page 338 and 339: Interrupt PresentationThe printer a
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Page 342 and 343: Add immediateMnemonicExecutiontime
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Page 346 and 347: BranchMnemonicExecutiont i me (ns)O
Page 350 and 351: Exclusive OR registertMnemonicExecu
Page 352 and 353: Level exitMnemonicExecutiontime (ns
Page 354 and 355: Load immediateMnemonicExecutiontime
Page 356 and 357: OR registerMnemonicExecutiontime (n
Page 358 and 359: Read protect key (provided only wit
Page 360 and 361: 1111■11111■111111111 1 11111111
Page 362 and 363: StopMnemonicExecutiontime Ins)Op co
Page 364 and 365: SubtractMnemonicExecutiontime (ns)O
Page 366 and 367: A-26 GA34-0003
Page 368 and 369: PIO instruction Function ModifierDe
Page 370 and 371: 1111111■111111PIO instruction Fun
Page 372 and 373: Valid responses to 2790 read comman
Page 374 and 375: Interrupt status wordsDevice0 1 2 3
Page 376 and 377: Device status word (2502, 5024 with
Page 378 and 379: 11.1 11111 11110•11111111111.1111
Page 380 and 381: 5028ConsoleShift/ 5028BSCAACCAContr
Page 382 and 383: 5028ConsoleShift/ 5028BSCAACCAContr
Page 384 and 385: triNtitTIBitRanges and bit values (
Page 386 and 387: .••■• III II III 11111.•
Page 388 and 389: E-6 GA34-0003
Page 390 and 391: Verifydata beforewrite analogoutput
Page 392 and 393: Prepare I/OSet referenceregisterYes
Page 394 and 395: F-6 GA34-0003IIII•1111■•■
Page 396 and 397: G-2 GA34-0003
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analog signal resolution (continued
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cycle steal feature data flow 2-3cy
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forced interruption control, digita
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initial program load (IPL) to Syste
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111111•1111111111■ IllO (OR) in
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ead, 5022 Disk Storage Module (cont
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11111111111111111■1 1111111 11111
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X-16 GA34-0003
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GA34-0003-7Your comments, please ..
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I 111111111111111.1 I MEM II 1 1111
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