IBM System/7 Functional Characteristics - All about the IBM 1130 ...

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The storage protect mechanism is disabled (turned off) by power-on reset, system reset, thereset caused by check restart, initial program load, the occurrence of a class interruption,and the execution of an SVC instruction. The storage and protect keys are not changed by anyof these actions. The keys are changed only by the appropriate alter storage or protect keyinstructions.The storage protect mechanism is enabled (turned on) by the execution of an alter storagekey or an alter protect key instruction. If these instructions are executed when storage protectis already enabled, it remains enabled.The protect key is read using the read protect key instruction. If any of the storage protectinstructions are issued on the 5010 Processor Module models A or B, a program checkcondition results and the instruction is not executed.To write into main storage, at least one of the following conditions must be true:1. The storage key of the addressed block must be 111.2. The protect key currently in use must be 000.3. The storage key of the addressed block must match the current protect key.The first two conditions above indicate that a storage key of 111 permits writing into anystorage location in that block regardless of the protect key used, and that a protect key of 000authorizes writing into any location in storage regardless of the storage key value of theaddressed block.If none of the three conditions specified above is true, the attempt to write is prevented, thecontents of main storage are not changed and a program check interruption occurs with invalidstorage address set in the processor status word.For certain hardware functions that involve accessing main storage, the key comparisonmechanism is suppressed. For these cases, no storage protect checking is performed until thehardware function is completed. Because of this:1. No storage protection is provided during an initial program load, since it is preceded by ahardware reset, and no instructions are executed until the initial program load is complete.2. No storage protect checking is performed while the system is in the stop state and storeoperations are being performed from the System/7 console.3. No storage protect checking is provided during a cycle steal operation.4. The hardware controlled storing of old instruction addresses during class interruptions is notaffected by storage protect.
System/7 InterruptionsCHAPTER CONTENTSPriority Interruptions 3-2Priority Levels 3-2Interruption Request Stacking 3-4Interruption Mask Register and Summary Mask 3-5Reserved Storage Locations 3-6Interrupt Sublevel Branching 3-8Class Interruptions 3-9Priority of Class Interruptions 3-9Machine Check 3-10Program Check 3-10Power/Thermal Warning 3-11IBM System/7 Functional Characteristics System/7 Interruptions 3-1©IBM Corp. 1970, 1971, 1972, 1974, 1975
Page 3 and 4: GA34-0003-7File No. S7-00IBM System
Page 5 and 6: ContentsPrefaceChapter 1. Introduct
Page 7 and 8: Flagging 15-26Track Initialization
Page 9 and 10: PrefaceThis reference manual is a s
Page 11 and 12: IntroductionCHAPTER CONTENTSSystem/
Page 13 and 14: Figure 1-1. IBM 5028 Operator Stati
Page 15 and 16: • One or two analog output points
Page 17 and 18: Power Failure and Thermal WarningPo
Page 19 and 20: IBM 5010 Processor ModuleCHAPTER CO
Page 21 and 22: StorageProcessorAACycleSteal/ Featu
Page 23 and 24: The processor does not recognize in
Page 25 and 26: DATA FORMATSInput/output data can b
Page 27 and 28: The absolute form can be obtained i
Page 29 and 30: Accumulators (ACC 0 to ACC 3)Page o
Page 31: Overflow IndicatorThe overflow indi
Page 35 and 36: Level 1interruptionprocessing'.ros
Page 37 and 38: Interruption Mask Register and Summ
Page 39 and 40: Page of GA34-0003-6,-7As Updated Au
Page 41 and 42: The accumulator associated with the
Page 43 and 44: Page of GA34-0003-6, -7As Updated A
Page 45 and 46: The summary mask isturned on; sampl
Page 47 and 48: Processor InstructionsCHAPTER CONTE
Page 49 and 50: InstructionMnemonic'OperationcodeLo
Page 51 and 52: ' rrrI !Mil,. '11111E1 luluINSTRUCT
Page 54 and 55: "" ',Pli iI 1114111111111111 111111
Page 56 and 57: Load Immediate (PLI)0 5 8 15Op code
Page 58 and 59: Store Accumulator (PST)0 5 8 15Op c
Page 60 and 61: vow wow. •1•01111111111111111
Page 62 and 63: NMI INNI 1111=111111 IM11111■1111
Page 64 and 65: 11111 !III VIII I 1101 1,411111111,
Page 66 and 67: I i 1111111'1Np■I0111m PIP ,ili11
Page 68 and 69: Example:Word in accumulator 0110 11
Page 70 and 71: Exclusive ORing occurs only between
Page 72 and 73: Shift Left Circular (PSLC)0 5 8 11
Page 74 and 75: Shift Right Arithmetic (PSRA)0 5 8
Page 76 and 77: Example:PB instruction(R = 110 spec
Page 78 and 79: Branch and Link Long (PBALL)0 5 8 1
Page 80 and 81: Branch Conditional (PBC►0 5 8 9 1
Page 82 and 83:
Branch and Unmask Long (BUL) (5010
Page 84 and 85:
Skip Conditional (PSKC)0 5 8 9 15Op
Page 86 and 87:
Example:0 5 8 15PAS instruction(loc
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Load from Register (PLR)0 5 8 15Op
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Load Processor Status (PLPS)0 5 8 1
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Write IAR Backup (WIB) (5010 Proces
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Store Indicators (STI) (5010 Proces
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Executing the OR-to-mask instructio
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the process position. If the system
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Read Protect Key (RPK)0 5 8 11 16 2
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Module address field:Module address
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11111E111111111 M11111111•11111 1
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1111111111111111111111■11•11111
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Page of GA34-0003-6, -7As Updated A
Page 110 and 111:
Sixteen bits of additional module i
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1 REG 1---LEVEL0 10 0 2 1 20 0 0 03
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CTL CHK (Control Check) LightThis l
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1111■111111,11,11N I IIIADDRESS L
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CHECK CONTROL SwitchThis three-posi
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START KeyPressing the start key cau
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The processor module contains two 1
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6-4 GA34-0003II I 1 1 III 111 1111
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.11.1111111.111 MP I 111.10114P III
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1111 Minn. 11111111R !VW IMF" !PFLI
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The ACCA must be selected in order
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111.1111 111111 N uData and control
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I II III• 1111111111111111 1•11
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Significant Bits Meaning7* Data set
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I■ 0=11 1111111 MEM11 1111111111
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". — •• 11•111•MI !IF lim
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V IIF 1,1 NM IICONTROL CHARACTERS A
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Character SynchronizationCharacter
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Bit 1-Reserved.Bit 2-Transmit Opera
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Page 150 and 151:
1,114plilloi 1110 1111 1111.11 VI P
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Page 154 and 155:
1 1 - 1111=111111111 111M 1111 111
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The 5028 Operator Station (Figure 9
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Thickness Paper - .004 + .0003" (0,
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Character bit position 84 Tape move
Page 162 and 163:
If the operator station motor is no
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Feed Tape and Print0 5 8 11 16 20 2
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Read 1SW0 5 8 11 16 20 26 31Op code
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The 5014 Analog Input Module Model
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Convert Analog Input with External
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Read ISW0 5 8 11 16 20 26 31Op code
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10-8 GA34-0003
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11111811111111.1.1.14.111.1111I II
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" 11, 141MINMIIIIF I WPM P IP !! 11
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Read and Convert ADC0 5 8 11 16 20
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Device Status Word (DSW): The 16 bi
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1411111111,1111111111n 111The 5014
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Convert Analog Input with External
Page 188 and 189:
12-6 GA34-0003
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The 5012 Multifunction Module Model
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MODULE DEVICE ADDRESSESANALOG INPUT
Page 194 and 195:
The range bits (RRR) in the control
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H1111111111111 1111.111111HIVRead A
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I/0 CommandsThe prepare I/O and hal
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Data stored in the register can hav
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If a particular amplifier gain was
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' 14 111•141111111111111011114111
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Read Digital Input Reference Regist
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Digital Input Groups Without Proces
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CIA ^iN1i Ma IIl AMINNNP u 11.!..11
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Write Analog Output Holding Registe
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1111111■11111111101=11111.1111111
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=111111111111111111 1 11 1 11111111
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DataThe data byte contains either d
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Read CommandsAll read commands are
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Write Null Acknowledge: This code (
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Area Station Local I/O Guidance Cha
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2791/2793 Adapter Critical timingIn
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BeginDSC* 05Write(AS enters data mo
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oww1111111111111111111111111,1,, V
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Bit 15 in the R register can be set
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The 5013 Digital I/O Module Model A
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The prepare I/O command is used as
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Read Digital Input RegisterO 5 8 11
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Set Digital Input Interrupt Control
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DIGITAL OUTPUT CONTROLThe Digital O
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The 2792 Remote Communications Cont
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Data TransmissionInformation is tra
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The functions of the five bytes in
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Code nameHexBit patternResponse Com
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Read End Acknowledge: This code (he
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Begin Diagnostic: This code (hexade
Page 256 and 257:
Page 258 and 259:
Command SequencesThe 2790 Control m
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An area station requiring service l
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Set Diagnostic Mode0 5 8 11 16 20 2
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14-32 GA34-0003
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FUNCTIONAL DESCRIPTIONThe IBM 5022
Page 268 and 269:
FILE ORGANIZATIONEach surface of ea
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Sector Identifier FormatEach identi
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If fewer than 128 words are to be t
Page 274 and 275:
When the IPL operation starts, the
Page 276 and 277:
Recalibrate Operation: A recalibrat
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1111 11 I 111111111111WRead Initial
Page 280 and 281:
If an error is detected during a da
Page 282 and 283:
None of the data read is transferre
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Error and Status ConditionsErrors d
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Significant Bits Meaning5* No recor
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Significant Bits Meaning3 Seek chec
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FLAGGINGThe condition of a track su
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Track Initialization ProceduresThe
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Bit 5—No Record FoundIt should be
Page 296 and 297:
15-32 GA34-0003
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I III 1111111111111111111111111111
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Interruptions to System/7The progra
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Initiate Read0 16 21 24 31111111Add
Page 304 and 305:
Device Status Word (DSW): The 16-bi
Page 306 and 307:
16-10 GA34-0003
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The IBM 5024 I/O Attachment Enclosu
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III 1111•1111111111•1111111 III
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11111 1 11•1111111111111111111111
Page 314 and 315:
Reset 5024The reset 5024 resets the
Page 316 and 317:
2502 Card Reader Translate TableA 2
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I/O Transfer BlockThe address of th
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Status Word 1.0 152502 status buffe
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Status Word 2.0 15Status word 1% St
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1 1 111111111111111111111111111•1
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IMP P 1111,1111.11,11311111 I MP 11
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11 11 1111111111 1 1111111111111111
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algaaaagIrlug",',/"'", BeltPosition
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• Disable Attention Interrupt 110
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Status Word 1.0 15aStatus word 1•
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Status Word 2.15Status word 1N+1Res
Page 338 and 339:
Interrupt PresentationThe printer a
Page 340 and 341:
17-30 GA34-0003
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Add immediateMnemonicExecutiontime
Page 344 and 345:
Alter storage key (provided only wi
Page 346 and 347:
BranchMnemonicExecutiont i me (ns)O
Page 348 and 349:
Branch conditionalMnemonicExecution
Page 350 and 351:
Exclusive OR registertMnemonicExecu
Page 352 and 353:
Level exitMnemonicExecutiontime (ns
Page 354 and 355:
Load immediateMnemonicExecutiontime
Page 356 and 357:
OR registerMnemonicExecutiontime (n
Page 358 and 359:
Read protect key (provided only wit
Page 360 and 361:
1111■11111■111111111 1 11111111
Page 362 and 363:
StopMnemonicExecutiontime Ins)Op co
Page 364 and 365:
SubtractMnemonicExecutiontime (ns)O
Page 366 and 367:
A-26 GA34-0003
Page 368 and 369:
PIO instruction Function ModifierDe
Page 370 and 371:
1111111■111111PIO instruction Fun
Page 372 and 373:
Valid responses to 2790 read comman
Page 374 and 375:
Interrupt status wordsDevice0 1 2 3
Page 376 and 377:
Device status word (2502, 5024 with
Page 378 and 379:
11.1 11111 11110•11111111111.1111
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5028ConsoleShift/ 5028BSCAACCAContr
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5028ConsoleShift/ 5028BSCAACCAContr
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triNtitTIBitRanges and bit values (
Page 386 and 387:
.••■• III II III 11111.•
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E-6 GA34-0003
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Verifydata beforewrite analogoutput
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Prepare I/OSet referenceregisterYes
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F-6 GA34-0003IIII•1111■•■
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G-2 GA34-0003
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analog signal resolution (continued
Page 400 and 401:
cycle steal feature data flow 2-3cy
Page 402 and 403:
forced interruption control, digita
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initial program load (IPL) to Syste
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111111•1111111111■ IllO (OR) in
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ead, 5022 Disk Storage Module (cont
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11111111111111111■1 1111111 11111
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X-16 GA34-0003
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GA34-0003-7Your comments, please ..
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I 111111111111111.1 I MEM II 1 1111
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