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IBM System/7 Functional Characteristics - All about the IBM 1130 ...

IBM System/7 Functional Characteristics - All about the IBM 1130 ...

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Accumulators (ACC 0 to ACC 3)Page of GA34-0003-6, -7As Updated August 20,1976By TNL GN34-0340The <strong>System</strong>/7 processor has four accumulators (ACC 0 to ACC 3), one for each priorityinterruption level (see Figure 2-2). These 16-bit registers are used in most arithmetic andlogical operations. Such operations are performed using one specified operand (fromstorage or from an index register) and one implied operand (<strong>the</strong> value previously loadedinto <strong>the</strong> accumulator). The result is in <strong>the</strong> accumulator at <strong>the</strong> end of <strong>the</strong> operation. Thisresult is obtained by a machine function that depends upon <strong>the</strong> instruction being executed.The following example illustrates <strong>the</strong> use of <strong>the</strong> accumulator:IIII Load one operand into accumulatorStorageOperand AOperand B IAccumulatorOperand A1111 Perform arithmetic operation (such as operand A plus operand B)StorageOperand AAccumulatorOperand A1111 Result of arithmetic operation appears in accumulatorStorageAccumulatorResultNotice that operand A andoperand B are still in <strong>the</strong>iroriginal storage locationsThe contents of any selected accumulator can be displayed on <strong>the</strong> operator console ormodified via <strong>the</strong> console switches.IInterruption Mask Register and Summary MaskThe interruption mask register is a 4-bit register shown in Figure 2-2. The bits arenumbered 0 to 3, each bit corresponding to priority interruption levels 0 to 3, respectively.The appropriate bit in <strong>the</strong> mask register is set on (given a 1 value), to enable <strong>the</strong> correspondingpriority interruption level. That is, interrupting sources assigned to that prioritylevel can present interruptions to <strong>the</strong> system if <strong>the</strong>ir priority is higher than that of <strong>the</strong>current operating program. In addition, <strong>the</strong>re is a summary mask bit which, when on,prevents acceptance of priority interruptions without changing <strong>the</strong> contents of <strong>the</strong>interruption mask register. Power/<strong>the</strong>rmal warning interruptions are also disabled when<strong>the</strong> summary mask is on.<strong>IBM</strong> 5010 Processor Module 2-11

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