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IBM System/7 Functional Characteristics - All about the IBM 1130 ...

IBM System/7 Functional Characteristics - All about the IBM 1130 ...

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If an error is detected during a data transfer on <strong>the</strong> internal interface or in storage, <strong>the</strong>data address register contains <strong>the</strong> address associated with <strong>the</strong> word that failed to transfer.The any:error bit (bit 3), channel-end bit (bit 11), device-end bit (bit 13), and <strong>the</strong>appropriate error bit are set in <strong>the</strong> ISW.If a check character error for data is detected, <strong>the</strong> data address register contains anaddress one greater than that of <strong>the</strong> last word transferred. The any-error bit (bit 3),channel-end bit (bit 11), device-end bit (bit 13), and <strong>the</strong> read-ISWEX bit (bit 15) are setin <strong>the</strong> ISW. The ISWEX contains <strong>the</strong> file-data-check bit (bit 4).If an overrun is detected (that is, file data service requirements are not met) <strong>the</strong> dataaddress register contains <strong>the</strong> address associated with <strong>the</strong> word where data service failed.The overrun bit (bit 2), any-error bit (bit 3), channel-end bit (bit 11), and <strong>the</strong> device-endbit (bit 13) are set in <strong>the</strong> ISW. (See "Operating and Programming Restrictions" in thischapter.)If <strong>the</strong> track index pulse is encountered before <strong>the</strong> count becomes zero, <strong>the</strong> data addressregister contains an address one greater than <strong>the</strong> address associated with <strong>the</strong> last wordtransferred successfully. The incorrect-length-record bit (bit 6), any-error bit (bit 3),channel-end bit (bit 11), and <strong>the</strong> device-end bit (bit 13) are set in <strong>the</strong> ISW.If <strong>the</strong> count becomes zero during <strong>the</strong> data transfer and no errors are detected, a normalend condition occurs. The data address register contains an address one greater than <strong>the</strong>address of <strong>the</strong> last word transferred successfully. The channel-end bit (bit 11) and <strong>the</strong>device-end bit (bit 13) are set in <strong>the</strong>,ISW.Load Next Sector ID0 5 8 11 16 20 26 31Op code R Fun Zeros Mod DA MA00001 XXXO 01 000000010 ******XXXXXX1 iii II II Iitl III 1111 I 111110 8-F 2 0 2 0 0-3 XThis command loads into an ID buffer <strong>the</strong> next sector ID that passes under a selectedread/write head. The disk and head are specified by <strong>the</strong> control information word containedin <strong>the</strong> index register (R), or <strong>the</strong> accumulator if R=000. The control informationword has <strong>the</strong> following format:0 1 2 15R HX 0 0 0 0 0 0 0 0 0 0 0 0 0 0IX 0 0 0For models 1 and 2 of <strong>the</strong> disk storage module, <strong>the</strong> R-bit selects <strong>the</strong> disk (upper or lower)for use by this and subsequent read or write commands addressed to <strong>the</strong> module. R=0selects <strong>the</strong> upper disk; R=1 selects <strong>the</strong> lower disk. For models 3 and 4, <strong>the</strong> R-bit alwaysequals 1.15-16 GA34-0003

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