IBM System/7 Functional Characteristics - All about the IBM 1130 ...

Request Interrupt to 1130: Bit 15 set to 1 in the data word sent by the set interruptPIO command requests that an attention interruption request be established to the 1130processor. The contents of the level field in the data word are ignored.The 1130 host attachment in the System/7 processor module generates an interruptionon the 1130 SAC, and sets on the attention status bit for use by the 1130 system whenit services the interruption.Condition code settings for this use of the set interrupt command are:00—An interruption request was made and attention status bit was set on in the 1130host attachment (does not indicate whether the 1130 has received and/orrecognized the interrupt).01—Does not occur with this use of the command.10—An attention status bit was already set on, so this command is not honored.11-1130 processor is off line or not in the System/7 configuration.50241/0 Attachment Enclosure. For information see Chapter 17.Read Cycle Steal (Fun=110)A read cycle steal command transfers up to 3,072 words of data from the disk storagemodule to main storage. The result indicators are not changed by this command.Write Cycle Steal (Fun=111)A write cycle steal command transfers up to 3.072 words of data from main storage to thedisk storage module. The result indicators are not changed by this command.Status IndicatorsStatus bits are used in the System/7 to indicate to the program the status of I/O devicesattached to the system. These status bits can represent error conditions or they canrepresent normal operating conditions. Some status bits also present an interruptionrequest to the processor. There is one device status word (DSW) associated with eachmodule in the System/7. An interrupt status word (ISW) is associated with eachinterrupting source within a module, since some modules can contain several types ofI/O devices. (For example, the operator station, timer, ACCA, and BSCA circuits all reside inthe processor module.) A status condition may set multiple bits in the ISW for that device.Device Status Word (DSW)The 16 bits in the DSW are set on as a result of errors occurring during the executionof an I/O instruction, that is, before the condition code is set. No interruptions resultfrom setting on a DSW bit because the presence of recorded errors is indicated to theprogram by condition code 1. The DSW is read by the read DSW command in the followinggeneral format:0 5 8 11 16 20 26 31Op code R Fun Zeros Mod DA MAoo 001 X X O1 0 0 0 0 0 0 0 1 1 11* — * * *x*xxxxIli! II II !III III 11111 11111s'••••••■■•■••■••” ■•■••••.„....m."•••••••■,..11... •••••••■,•■•■•• ••••••■••••■••0 8-F 4 0 7 0 0-3 XThe read DSW command and the specific status bits that apply are described for each I/Omodule in its respective chapter of this manual.Once an error is recorded in the DSW, any subsequent command (except halt I/O and readDSW) to the device is rejected and the condition code is set to 1 until the DSW is resetby a system reset, a halt I/O, or a read DSW command.Processor Instructions 4-59„fiang 1,,PPIPPARRRWIRPRI