Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...

Host Bridge/DRAM Controller Registers (D0:F0)
4.1.16 GGC—GMCH Graphics Control Register (D0:F0) (Intel ®
82945G/82945GC/82945GZ GMCH Only)
PCI Device: 0
Address Offset: 52h
Default Value: 0030h
Access: R/W/L
Size: 16 bits
Bit Access &
Default
15:7 Reserved
6:4 R/W/L
011 b
Descriptions
Graphics Mode Select (GMS): This field selects the amount of main memory
that is pre-allocated to support the internal graphics device in VGA (non-linear)
and native (linear) modes. BIOS ensures that memory is pre-allocated only when
internal graphics is enabled.
000 = No memory pre-allocated. Device 2 (IGD) does not claim VGA cycles
(Memory and I/O), and the Sub-Class Code field within D2:F0 Class Code
register is 80h.
001 = DVMT (UMA) mode, 1 MB of memory pre-allocated for frame buffer.
010 = Reserved.
011 = DVMT (UMA) mode, 8 MB of memory pre-allocated for frame buffer.
100 = Reserved
101 = Reserved
110 = Reserved
111 = Reserved
3:2 Reserved
1 R/W
0 b
0 Reserved
NOTE: This register is locked and becomes read only when the D_LCK bit in the
SMRAM register is set.
IGD VGA Disable (IVD):
0 = Enable. Device 2 (IGD) claims VGA cycles (memory and I/O); the Sub-Class
Code within Device 2 Class Code register is 00.
1 = Disable. Device 2 (IGD) does not claim VGA cycles (memory and I/O); the
Sub-Class Code field within D2:F0 Class Code register is 80h.
74 Intel ® 82945G/82945GZ/82945GC GMCH and 82945P/82945PL MCH Datasheet