Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...

Host Bridge/DRAM Controller Registers (D0:F0)
Address
Offset
Symbol Register Name
48–4Bh PCIEXBAR PCI Express* Register Range Base Address
(Intel ® 82945G/82945GC/82945P/82945PL
(G)MCH Only)
4C–4Fh DMIBAR Root Complex Register Range Base
Address
Default
Value
Access
E0000000h R/W
00000000h R/W
50–51h — Reserved — —
52–53h GGC GMCH Graphics Control Register
(82945G/82945GC/82945GZ GMCH only)
54–57h DEVEN Device Enable See register
description
0030h R/W/L
58–8Fh — Reserved — —
90h PAM0 Programmable Attribute Map 0 00h R/W
91h PAM1 Programmable Attribute Map 1 00h R/W
92h PAM2 Programmable Attribute Map 2 00h R/W
93h PAM3 Programmable Attribute Map 3 00h R/W
94h PAM4 Programmable Attribute Map 4 00h R/W
95h PAM5 Programmable Attribute Map 5 00h R/W
96h PAM6 Programmable Attribute Map 6 00h R/W
97h LAC Legacy Access Control 00h R/W
98–9Bh — Reserved — —
9Ch TOLUD Top of Low Usable DRAM 08h R/W
9Dh SMRAM System Management RAM Control 00h RO, R/W,
R/W/L
9Eh ESMRAMC Extended System Management RAM Control 38h RO, R/W/L
9F–C7h — Reserved — —
C8–C9h ERRSTS Error Status 0000h RO, R/W/L
CA–CBh ERRCMD Error Command 0000h R/W
CC–DBh — Reserved — —
DC–DFh SKPD Scratchpad Data 00000000h R/W
E0–E8h CAPID0 Capability Identifier See register
description
62 Intel ® 82945G/82945GZ/82945GC GMCH and 82945P/82945PL MCH Datasheet
R/W
RO