Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...

Bit Access
&
Default
10:8 R/W
000b
7:2 R/W
00h
1:0 Reserved
Description
Register Description
Function Number: This field allows the configuration registers of a particular
function in a multi-function device to be accessed. The (G)MCH ignores
configuration cycles to its internal devices if the function number is not equal to 0
or 1.
This field is mapped to byte 6 [2:0] of the request header format during PCI
Express configuration cycles and A[10:8] during the DMI configuration cycles.
Register Number: This field selects one register within a particular bus, device,
and function as specified by the other fields in the Configuration Address Register.
This field is mapped to byte 7 [7:2] of the request header format during PCI
Express configuration cycles and A[7:2] during the DMI Configuration cycles.
3.5.2 CONFIG_DATA—Configuration Data Register
I/O Address: 0CFCh
Default Value: 00000000h
Access: R/W
Size: 32 bits
CONFIG_DATA is a 32-bit read/write window into configuration space. The portion of
configuration space that is referenced by CONFIG_DATA is determined by the contents of
CONFIG_ADDRESS.
Bit Access &
Default
31:0 R/W
0000 0000h
Description
Configuration Data Window (CDW): If bit 31 of the CONFIG_ADDRESS
Register is 1, any I/O access to the CONFIG_DATA register will produce a
configuration transaction using the contents of CONFIG_ADDRESS to
determine the bus, device, function, and offset of the register to be accessed.
Intel ® 82945G/82945G/82945GC GMCH and 82945P/82945PL MCH Datasheet 59
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