Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...

3.4 Routing Configuration Accesses
Register Description
The (G)MCH supports two PCI related interfaces: DMI and PCI Express. The (G)MCH is
responsible for routing PCI and PCI Express configuration cycles to the appropriate device that is
an integrated part of the (G)MCH or to one of these two interfaces. Configuration cycles to the
ICH7 internal devices and Primary PCI (including downstream devices) are routed to the ICH7
via DMI. Configuration cycles to both the PCI Express graphics PCI compatibility configuration
space and the PCI Express graphics extended configuration space are routed to the PCI Express
graphics port device or associated link.
Figure 3-4. Intel ® 82945G/82945GC (G)MCH Configuration Cycle Flow Chart
GMCH Generates
Type 1 Access to
PCI Express
Device# = 0
No
GMCH allows cycle to
go to DMI resulting in
Master Abort
Yes
Yes
Yes
DWord I/O Write to
CONFIG_ADDRESS
with bit 31 = 1
I/O Read/Write to
CONFIG_DATA
Bus# = 0
No
Bus# > Sec Bus
Bus# � Sub Bus in
GMCH Dev 1
No
Bus# =
Secondary Bus in
GMCH Dev 1
No
GMCH Generates DMI
Type 1Configuration
Cycle
GMCH Generates
Type 0 Access
to PCI Express
Dev# = 0 &
Func# = 0
Dev# = 1 &
Dev# 1 Enabled
& Func# = 0
Dev# = 2 &
(Func#=0 & Dev#2,
Func#0 Enabled)
OR
(Func#=1 & Dev#2,
Funcs#0&1 Enabled)
GMCH Generates DMI
Type 0 Configuration
Cycle
GMCH Claims
GMCH Claims
GMCH Claims
Intel ® 82945G/82945G/82945GC GMCH and 82945P/82945PL MCH Datasheet 55
Yes
No
No
No
Yes
Yes
Yes
Config_Cyc_Flow