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Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...

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2 Signal Description<br />

Signal Description<br />

This chapter provides a detailed description of (G)MCH signals. The signals are arranged in<br />

functional groups according to their associated interface (see Figure 2-1).<br />

The following notations are used to describe the signal type:<br />

PCIE PCI <strong>Express</strong> interface signals. These signals are compatible with PCI <strong>Express</strong> 1.0<br />

Signaling Environment AC Specifications and are AC coupled. The buffers are<br />

not 3.3 V tolerant. Differential voltage specification = (|D+ - D-|) * 2<br />

= 1.2 Vmax. Single-ended maximum = 1.5 V. Single-ended minimum = 0 V.<br />

DMI Direct Media Interface signals. These signals are compatible with PCI <strong>Express</strong> 1.0<br />

Signaling Environment AC Specifications, but are DC coupled. The buffers are<br />

not 3.3 V tolerant. Differential voltage specification = (|D+ - D-|) * 2<br />

= 1.2 Vmax. Single-ended maximum = 1.5 V. Single-ended minimum = 0 V.<br />

CMOS CMOS buffers. 1.5 V tolerant.<br />

COD CMOS Open Drain buffers. 2.5 V tolerant.<br />

HCSL Host Clock Signal Level buffers. Current mode differential pair. Differential<br />

typical swing = (|D+ - D-|) * 2 = 1.4 V. Single ended input tolerant from -0.35 V<br />

to 1.2 V. Typical crossing voltage is 0.35 V.<br />

HVCMOS High Voltage CMOS buffers. 2.5 V tolerant.<br />

HVIN High Voltage CMOS input-only buffers. 3.3 V tolerant.<br />

SSTL-1.8 Stub Series Termination Logic. These are 1.8 V output capable buffers. 1.8 V<br />

tolerant.<br />

A Analog reference or output. May be used as a threshold voltage or for buffer<br />

compensation.<br />

Intel ® 82<strong>945G</strong>/82<strong>945G</strong>/82<strong>945G</strong>C GMCH and 82<strong>945P</strong>/82<strong>945P</strong>L MCH Datasheet 31

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