Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...
Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ... Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...
Introduction 1.3.4 PCI Express* Interface (Intel ® 82945G/82945GC/82945P/82945PL (G)MCH Only) The 82945G/82945GC/82945P/82945PL (G)MCH contains one 16-lane (x16) PCI Express port intended for an external PCI Express graphics card. The PCI Express port is compliant to the PCI Express* Base Specification, Revision 1.0a. The x16 port operates at a frequency of 2.5 Gb/s on each lane while employing 8b/10b encoding, and supports a maximum theoretical bandwidth of 4 Gb/s each direction. The 82945G GMCH multiplexes the PCI Express interface with two Intel ® SDVO ports. � One, 16-lane PCI Express port intended for Graphics Attach, compatible to the PCI Express* Base Specification, Revision 1.0a. � A base PCI Express frequency of 2.5 Gb/s only. � Raw bit-rate on the data pins of 2.5 Gb/s, resulting in a real bandwidth per pair of 250 MB/s given the 8b/10b encoding used to transmit data across this interface � Maximum theoretical realized bandwidth on the interface of 4 GB/s in each direction simultaneously, for an aggregate of 8 GB/s when x16. � PCI Express extended configuration space. The first 256 bytes of configuration space is aliased directly to the PCI Compatibility configuration space. The remaining portion of the fixed 4-KB block of memory-mapped space above the first 256 bytes (starting at 100h) is known as extended configuration space. � PCI Express Enhanced Addressing Mechanism. This mechanism accesses the device configuration space in a flat memory mapped fashion. � Automatic discovery, negotiation, and training of link out of reset � Supports traditional PCI style traffic (asynchronous snooped, PCI ordering) � Supports traditional AGP style traffic (asynchronous non-snooped, PCI Express-relaxed ordering) � Hierarchical PCI-compliant configuration mechanism for downstream devices (i.e., normal PCI 2.3 Configuration space as a PCI-to-PCI bridge) � Supports “static” lane numbering reversal. This method of lane reversal is controlled by a Hardware Reset strap, and reverses both the receivers and transmitters for all lanes (e.g., TX15->TX0, RX15->RX0). This method is transparent to all external devices and is different than lane reversal as defined in the PCI Express specification. In particular, link initialization is not affected by static lane reversal. 26 Intel ® 82945G/82945GZ/82945GC GMCH and 82945P/82945PL MCH Datasheet
Introduction 1.4 Graphics (Intel ® 82945G/82945GC/82945GZ GMCH Only) The 82945G/82945GC/82945GZ GMCH provides an integrated graphics device (IGD) delivering cost competitive 3D, 2D, and video capabilities. The GMCH contains an extensive set of instructions for 3D operations, BLT and Stretch BLT operations, motion compensation, overlay, and display control. The GMCH’s video engines support video conferencing and other video applications. The GMCH does not support a dedicated local graphics memory interface, it may only be used in a UMA configuration. The GMCH also has the capability to support external graphics accelerators via the PCI Express Graphics (PEG) port but cannot work concurrently with the integrated graphics device. High bandwidth access to data is provided through the system memory port. The GMCH also provides 3D hardware acceleration for block-level transfers of data (BLTs). The 2D BLTs are considered a special case of 3D transfers and use the 3D acceleration. The BLT engine provides the ability to copy a source block of data to a destination and perform raster operations (e.g., ROP1, ROP2, and ROP3) on the data using a pattern, and/or another destination. Performing these common tasks in hardware reduces processor load, and thus improves performance. Intel ® 82945G/82945G/82945GC GMCH and 82945P/82945PL MCH Datasheet 27
- Page 1 and 2: Intel ® 945G/945GZ/945GC/ 945P/945
- Page 3 and 4: Contents 1 Introduction ...........
- Page 5 and 6: 4.2.11 C0DRC1—Channel A DRAM Cont
- Page 7 and 8: 6.1.16 DMICESTS—DMI Correctable E
- Page 9 and 10: 9.4.5 SMM Space Decode and Transact
- Page 11 and 12: 11.3 DC Characteristics ...........
- Page 13 and 14: Revision History Rev Description Da
- Page 15 and 16: Intel ® 82945G/82945GZ/82945GC/829
- Page 17 and 18: 1 Introduction Introduction The Int
- Page 19 and 20: Figure 1-2. Intel ® 945GZ/82945GC
- Page 21 and 22: 1.1 Terminology Term Description Ac
- Page 23 and 24: Term Description TOLM Top Of Low Me
- Page 25: Introduction � Supports four bank
- Page 29 and 30: 1.5 Analog and SDVO Displays (Intel
- Page 31 and 32: 2 Signal Description Signal Descrip
- Page 33 and 34: 2.1 Host Interface Signals Signal D
- Page 35 and 36: Signal Name Type Description HREQ[4
- Page 37 and 38: 2.3 DDR2 DRAM Channel B Interface S
- Page 39 and 40: Signal Description 2.6 Analog Displ
- Page 41 and 42: 2.8 Direct Media Interface (DMI) Si
- Page 43 and 44: 2.10 Power and Ground Name Voltage
- Page 45 and 46: Interface Signal Name I/O System Me
- Page 47 and 48: Interface Signal Name I/O State Dur
- Page 49 and 50: 3 Register Description Register Des
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- Page 53 and 54: 3.3 Configuration Mechanisms Regist
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- Page 59 and 60: Bit Access & Default 10:8 R/W 000b
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- Page 63 and 64: 4.1 Device 0 Configuration Register
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- Page 69 and 70: 4.1.12 EPBAR—Egress Port Base Add
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Introduction<br />
1.4 Graphics (Intel ® 82<strong>945G</strong>/82<strong>945G</strong>C/82<strong>945G</strong>Z GMCH<br />
Only)<br />
The 82<strong>945G</strong>/82<strong>945G</strong>C/82<strong>945G</strong>Z GMCH provides an integrated graphics device (IGD) delivering<br />
cost competitive 3D, 2D, and video capabilities. The GMCH contains an extensive set of<br />
instructions for 3D operations, BLT and Stretch BLT operations, motion compensation, overlay,<br />
and display control. The GMCH’s video engines support video conferencing and other video<br />
applications. The GMCH does not support a dedicated local graphics memory interface, it may<br />
only be used in a UMA configuration. The GMCH also has the capability to support external<br />
graphics accelerators via the PCI <strong>Express</strong> Graphics (PEG) port but cannot work concurrently with<br />
the integrated graphics device. High bandwidth access to data is provided through the system<br />
memory port. The GMCH also provides 3D hardware acceleration for block-level transfers of<br />
data (BLTs). The 2D BLTs are considered a special case of 3D transfers and use the 3D<br />
acceleration. The BLT engine provides the ability to copy a source block of data to a destination<br />
and perform raster operations (e.g., ROP1, ROP2, and ROP3) on the data using a pattern, and/or<br />
another destination. Performing these common tasks in hardware reduces processor load, and thus<br />
improves performance.<br />
Intel ® 82<strong>945G</strong>/82<strong>945G</strong>/82<strong>945G</strong>C GMCH and 82<strong>945P</strong>/82<strong>945P</strong>L MCH Datasheet 27
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