Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...

Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ... Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...

16.08.2012 Views

Electrical Characteristics Signal Group 266 Signal Type Signals Notes (l) Miscellaneous Inputs RSTIN#, PWROK Miscellaneous HVCMOS Output (m) Low Voltage Diff. Clock Input (n) HVCMOS I/O (82945G/82945GC/8 2945GZ GMCH Only) I/O Buffer Supply Voltages (o) System Bus Input Supply Voltage (p) 1.5 V SDVO, PCI Express Supply Voltages (q) 1.8 V DDR2 Supply Voltage (r) 1.5 V DDR2 PLL Analog Supply Voltage (s) 1.5 V (G)MCH Core Supply Voltage (t) 2.5 V CMOS Supply Voltage (u) 2.5 V RGB/CRT DAC Display Analog Supply Voltage (v) PLL Analog Supply Voltages ICH_SYNC# HCLKN, HCLKP, DREFCLKP, DREFCLKN, GCLKP, GCLKN SDVO_CRTLCLK, SDVO_CTRLDATA, DDC_CLK, DDC_DATA VTT VCC_EXP VCCSM VCC_SMPLL VCC VCC2 VCCA_DAC VCCA_HPLL, VCCA_EXPPLL, VCCA_DPLLA, VCCA_DPLLB NOTE: 1. Current Mode Reference pin. DC Specification not required

11.3 DC Characteristics Table 11-5. DC Characteristics Symbol Signal Group I/O Buffer Supply Voltage (AC Noise not included unless noted) Electrical Characteristics Parameter Min Nom Max Unit Notes VCCSM (q) DDR2 I/O Supply Voltage 1.7 1.8 1.9 V 4 VCCA_SMPLL (r) DDR2 I/O PLL Analog Supply Voltage VCC_EXP (p) SDVO, PCI-Express Supply Voltage VTT (o) System Bus Input Supply Voltage 1.425 1.5 1.575 V 1.425 1.5 1.575 V 1.14 1.2 1.26 V VCC (s) GMCH Core Supply Voltage 1.425 1.5 1.575 V 11 VCC2 (t) CMOS Supply Voltage 2.375 2.5 2.625 V VCCA_DAC (u) CRT Display DAC Supply Voltage VCCA_HPLL, VCCA_EXPPLL , VCCA_DPLLA, VCCA_DPLLB Reference Voltages (v) Various PLLs’ Analog Supply Voltages HVREF (d) Host Address, Data, and Common Clock Signal Reference Voltage HSWING (d) Host Compensation Reference Voltage 2.375 2.5 2.625 V 1.425 1.5 1.575 V 0.63 x VTT –2% 0.63 x VTT 0.63 x VTT +2% V 0.22 x VTT –2% 0.22 x VTT 0.22 x VTT+2% V SMVREF (j) DDR2 Reference Voltage 0.49 x VCCSM 0.50 x VCCSM 0.51 x VCCSM V Host Interface VIL_H (a, c, c1) Host GTL+ Input Low Voltage -0.10 0 (0.63 x VTT) – 0.1 V VIH_H (a, c, c1) Host GTL+ Input High Voltage (0.63 x VTT)+0.1 VOL_H (a, b) Host GTL+ Output Low Voltage VOH_H (a, b) Host GTL+ Output High Voltage IOL_H (a, b) Host GTL+ Output Low Current ILEAK_H (a, c, c1) Host GTL+ Input Leakage Current VTT VTT +0.1 V — — (0.22 x VTT)+0.1 V VTT – 0.1 — VTT V — — VTTmax *(1–0.22) / Rttmin mA Rttmin = 54 � — — 20 �A VOL

11.3 DC Characteristics<br />

Table 11-5. DC Characteristics<br />

Symbol Signal<br />

Group<br />

I/O Buffer Supply Voltage (AC Noise not included unless noted)<br />

Electrical Characteristics<br />

Parameter Min Nom Max Unit Notes<br />

VCCSM (q) DDR2 I/O Supply Voltage 1.7 1.8 1.9 V 4<br />

VCCA_SMPLL (r) DDR2 I/O PLL Analog Supply<br />

Voltage<br />

VCC_EXP (p) SDVO, PCI-<strong>Express</strong> Supply<br />

Voltage<br />

VTT (o) System Bus Input Supply<br />

Voltage<br />

1.425 1.5 1.575 V<br />

1.425 1.5 1.575 V<br />

1.14 1.2 1.26 V<br />

VCC (s) GMCH Core Supply Voltage 1.425 1.5 1.575 V 11<br />

VCC2 (t) CMOS Supply Voltage 2.375 2.5 2.625 V<br />

VCCA_DAC (u) CRT Display DAC Supply<br />

Voltage<br />

VCCA_HPLL,<br />

VCCA_EXPPLL<br />

,<br />

VCCA_DPLLA,<br />

VCCA_DPLLB<br />

Reference Voltages<br />

(v) Various PLLs’ Analog Supply<br />

Voltages<br />

HVREF (d) Host Address, Data, and<br />

Common Clock Signal<br />

Reference Voltage<br />

HSWING (d) Host Compensation Reference<br />

Voltage<br />

2.375 2.5 2.625 V<br />

1.425 1.5 1.575 V<br />

0.63 x VTT –2% 0.63 x VTT 0.63 x VTT +2% V<br />

0.22 x VTT –2% 0.22 x VTT 0.22 x VTT+2% V<br />

SMVREF (j) DDR2 Reference Voltage 0.49 x VCCSM 0.50 x VCCSM 0.51 x VCCSM V<br />

Host Interface<br />

VIL_H (a, c, c1) Host GTL+ Input Low Voltage -0.10 0 (0.63 x VTT) – 0.1 V<br />

VIH_H (a, c, c1) Host GTL+ Input High Voltage (0.63 x<br />

VTT)+0.1<br />

VOL_H (a, b) Host GTL+ Output Low<br />

Voltage<br />

VOH_H (a, b) Host GTL+ Output High<br />

Voltage<br />

IOL_H (a, b) Host GTL+ Output Low<br />

Current<br />

ILEAK_H (a, c, c1) Host GTL+ Input Leakage<br />

Current<br />

VTT VTT +0.1 V<br />

— — (0.22 x VTT)+0.1 V<br />

VTT – 0.1 — VTT V<br />

— — VTTmax *(1–0.22) /<br />

Rttmin<br />

mA Rttmin = 54 �<br />

— — 20 �A VOL

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