Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...

Electrical Characteristics
11.2 Signal Groups
The signal description includes the type of buffer used for the particular signal:
GTL+ Open Drain GTL+ interface signal. Refer to the GTL+ I/O Specification
for complete details. The (G)MCH integrates most GTL+ termination
resistors.
DDR2 DDR2 System memory (1.8 V CMOS buffers)
PCI Express/SDVO PCI Express interface signals. These signals are compatible with PCI
Express 1.0a signaling environment AC specifications. The buffers are
not 3.3 V tolerant.
Analog Analog signal interface
Ref Voltage reference signal
HVCMOS 2.5 V Tolerant High Voltage CMOS buffers
SSTL-1.8 1.8 V Tolerant Stub Series Termination Logic
Table 11-4. Signal Groups
Signal
Group
Host Interface Signal Groups
264
(a) GTL+
Signal Type Signals Notes
Input/Outputs
(b) GTL+
Common Clock
Outputs
(c) Asynchronous GTL+
Input
(d) Analog Host Interface
Reference and
Compensation
Signals
(c1) Miscellaneous CMOS
Inputs
HADS#, HBNR#, HBREQ0#, HDBSY#, HDRDY#,
HDINV[3:0]#, HA[31:3]#, HADSTB[1:0]#, HD[63:0],
HDSTBP[3:0]#, HDSTBN[3:0]#, HHIT#, HHITM#,
HREQ[4:0]#, HLOCK#
HBPRI#, HCPURST#, HDEFER#, HTRDY#, HRS[2:0]#,
HEDRDY#
HPCREQ#
HDVREF, HACCVREF, HSWING HRCOMP, HSCOMP
BSEL[2:0]