Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...
Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...
Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...
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9 System Address Map<br />
System Address Map<br />
The 82<strong>945G</strong>/82<strong>945P</strong> (G)MCH supports 4 GB of addressable memory space (see Figure 9-1) and<br />
64 KB+3 bytes of addressable I/O space. The 82<strong>945G</strong>C/82<strong>945G</strong>Z/82<strong>945P</strong>L (G)MCH supports 2<br />
GB of addressable memory space and 64 KB+3 bytes of addressable I/O space. A programmable<br />
memory address space under the 1-MB region is divided into regions that can be individually<br />
controlled with programmable attributes such as disable, read/write, write only, or read only. This<br />
section focuses on how the memory space is partitioned and memory region usage. The I/O<br />
address space has simpler mapping and is explained near the end of this section.<br />
Note: Address mapping information for the Integrated Graphics Device applies to the<br />
82<strong>945G</strong>/82<strong>945G</strong>C/82<strong>945G</strong>Z GMCH only. The 82<strong>945P</strong>/82<strong>945P</strong>L MCH does not have an IGD.<br />
Note: References to PCI <strong>Express</strong> applies to the 82<strong>945G</strong>/82<strong>945G</strong>C/82<strong>945P</strong>/82<strong>945P</strong>L (G)MCH only. The<br />
82<strong>945G</strong>Z GMCH does not support PCI <strong>Express</strong>.<br />
Note: References to 4 GB addressable memory space applies to the 82<strong>945G</strong>/82<strong>945P</strong> only. The<br />
82<strong>945G</strong>C/82<strong>945G</strong>Z/82<strong>945P</strong>L support 2 GB addressable memory space.<br />
Addressing of memory ranges larger than 4 GB (2 GB for 82<strong>945G</strong>C/82<strong>945G</strong>Z/82<strong>945P</strong>L) is not<br />
supported. The HREQ[4:3] FSB pins are decoded to determine whether the access is above or<br />
below 4 GB (2 GB for 82<strong>945G</strong>C/82<strong>945G</strong>Z/82<strong>945P</strong>L).<br />
The (G)MCH does not support the PCI Dual Address Cycle (DAC) mechanism, PCI <strong>Express</strong><br />
64-bit prefetchable memory transactions, or any other addressing mechanism that allows<br />
addressing of greater than 4 GB (2 GB for 82<strong>945G</strong>C/82<strong>945G</strong>Z/82<strong>945P</strong>L) on either the DMI or<br />
PCI <strong>Express</strong> interface. The (G)MCH does not limit system memory space in hardware. There is<br />
no hardware lock to prevent someone from inserting more memory than is addressable.<br />
In the following sections, it is assumed that all of the compatibility memory ranges reside on the<br />
DMI. The exception to this rule is VGA ranges that may be mapped to PCI <strong>Express</strong>, DMI, or to<br />
the internal graphics device (IGD). In the absence of more specific references, cycle descriptions<br />
referencing PCI should be interpreted as the DMI/PCI, while cycle descriptions referencing PCI<br />
<strong>Express</strong> or IGD are related to the PCI <strong>Express</strong> bus or the internal graphics device, respectively.<br />
The (G)MCH does not remap APIC or any other memory spaces above TOLUD (Top of Low<br />
Usable DRAM). The TOLUD register is set to the appropriate value by BIOS.<br />
The Address Map includes a number of programmable ranges:<br />
� Device 0<br />
� EPBAR – Egress port registers. Necessary for setting up VC1 as an isochronous channel<br />
using time based weighted round robin arbitration. (4-KB window)<br />
� MCHBAR – Memory mapped range for internal (G)MCH registers. For example,<br />
memory buffer register controls. (16-KB window)<br />
� PCIEXBAR (82<strong>945G</strong>/82<strong>945G</strong>C/82<strong>945P</strong>/82<strong>945P</strong>L Only) – Flat memory-mapped address<br />
space to access device configuration registers. This mechanism can be used to access<br />
PCI configuration space (0–FFh) and Extended configuration space (100h–FFFh) for<br />
PCI <strong>Express</strong> devices. This enhanced configuration access mechanism is defined in the<br />
PCI <strong>Express</strong> specification. (64 MB, 128 MB, or 256-MB window)<br />
Intel ® 82<strong>945G</strong>/82<strong>945G</strong>/82<strong>945G</strong>C GMCH and 82<strong>945P</strong>/82<strong>945P</strong>L MCH Datasheet 205
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