Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...

Integrated Graphics Device (D2:F1) Registers (Intel® 82945G/82945GC/82945GZ GMCH Only)
8.1.13 ROMADR—Video BIOS ROM Base Address (D2:F1)
PCI Device: 2
Address Offset: 30h
Default Value: 00000000h
Access: RO
Size: 32 bits
This register is a copy of Device 2, Function 0. It has the same read, write attributes as Function
0. It is implemented as common hardware with two access addresses.
8.1.14 CAPPOINT—Capabilities Pointer (D2:F1)
PCI Device: 2
Address Offset: 34h
Default Value: D0h
Access: RO
Size: 8 bits
This register is a copy of Device 2, Function 0. It has the same read, write attributes as Function
0. It is implemented as common hardware with two access addresses.
8.1.15 MINGNT—Minimum Grant Register (D2:F1)
PCI Device: 2
Address Offset: 3Eh
Default Value: 00h
Access: RO
Size: 8 bits
This register is a copy of Device 2, Function 0. It has the same read, write attributes as Function
0. It is implemented as common hardware with two access addresses.
8.1.16 MAXLAT—Maximum Latency (D2:F1)
PCI Device: 2
Address Offset: 3Fh
Default Value: 00h
Access: RO
Size: 8 bits
This register is a copy of Device 2, Function 0. It has the same read, write attributes as Function
0. It is implemented as common hardware with two access addresses.
198 Intel ® 82945G/82945GZ/82945GC GMCH and 82945P/82945PL MCH Datasheet