Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...
Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ... Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...
Integrated Graphics Device (D2:F0) (Intel® 82945G/82945GC/ 82945GZ GMCH Only) 190 Intel ® 82945G/82945GZ/82945GC GMCH and 82945P/82945PL MCH Datasheet
Integrated Graphics Device (D2:F1) Registers (Intel® 82945G/82945GC/82945GZ GMCH Only) 8 Integrated Graphics Device (D2:F1) Registers (Intel ® 82945G/82945GC/82945GZ GMCH Only) The Integrated Graphics Device registers are located in Device 0 (D0), Function 0 (F0) and Function 1 (F1). This chapter provides the descriptions for the D2:F1 registers. Table 8-1 provides an address map of the D2:F1registers listed in ascending order by address offset. Detailed bit descriptions follow this table. Table 8-1. Device 2 Function 1 Register Address Map (D2:F1) Address Offset Symbol Register Name Default Value Access 00–01h VID2 Vendor Identification 8086h RO 02–03h DID2 Device Identification 2776h RO 04–05h PCICMD2 PCI Command 0000h RO, R/W 06–07h PCISTS2 PCI Status 0090h RO 08h RID2 Revision Identification See register description 09–0Bh CC Class Code Register 03800h RO 0Ch CLS Cache Line Size 00h RO 0Dh MLT2 Master Latency Timer 00h RO 0Eh HDR2 Header Type Register 80h RO 0Fh — Reserved — — 10–13h MMADR Memory Mapped Range Address 00000000h RO, R/W 14–2Bh — Reserved — — 2C–2Dh SVID2 Subsystem Vendor Identification 0000h R/WO 2E–2Fh SID2 Subsystem Identification 0000h R/WO 30–33h ROMADR Video BIOS ROM Base Address 00000000h RO 34h CAPPOINT Capabilities Pointer D0h RO 35–3Dh — Reserved — — 3Eh MINGNT Minimum Grant Register 00h RO 3Fh MAXLAT Maximum Latency 00h RO 40–43h — Reserved — — Intel ® 82945G/82945G/82945GC GMCH and 82945P/82945PL MCH Datasheet 191 RO
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- Page 141 and 142: 5.1.39 SLOTCAP—Slot Capabilities
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- Page 161 and 162: Direct Media Interface (DMI) RCRB 6
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- Page 169 and 170: 6.1.13 DMILSTS—DMI Link Status MM
- Page 171 and 172: 6.1.15 DMIUEMSK—DMI Uncorrectable
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- Page 221 and 222: 9.4.12 Legacy VGA and I/O Range Dec
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- Page 235 and 236: Figure 10-2. SDVO Conceptual Block
- Page 237 and 238: Figure 10-3. Concurrent SDVO / PCI
- Page 239 and 240: 10.5 Integrated Graphics Device (In
Integrated Graphics Device (D2:F1) Registers (<strong>Intel®</strong> 82<strong>945G</strong>/82<strong>945G</strong>C/82<strong>945G</strong>Z GMCH Only)<br />
8 Integrated Graphics Device<br />
(D2:F1) Registers (Intel ®<br />
82<strong>945G</strong>/82<strong>945G</strong>C/82<strong>945G</strong>Z GMCH<br />
Only)<br />
The Integrated Graphics Device registers are located in Device 0 (D0), Function 0 (F0) and<br />
Function 1 (F1). This chapter provides the descriptions for the D2:F1 registers. Table 8-1<br />
provides an address map of the D2:F1registers listed in ascending order by address offset.<br />
Detailed bit descriptions follow this table.<br />
Table 8-1. Device 2 Function 1 Register Address Map (D2:F1)<br />
Address<br />
Offset<br />
Symbol Register Name Default<br />
Value<br />
Access<br />
00–01h VID2 Vendor Identification 8086h RO<br />
02–03h DID2 Device Identification 2776h RO<br />
04–05h PCICMD2 PCI Command 0000h RO, R/W<br />
06–07h PCISTS2 PCI Status 0090h RO<br />
08h RID2 Revision Identification See register<br />
description<br />
09–0Bh CC Class Code Register 03800h RO<br />
0Ch CLS Cache Line Size 00h RO<br />
0Dh MLT2 Master Latency Timer 00h RO<br />
0Eh HDR2 Header Type Register 80h RO<br />
0Fh — Reserved — —<br />
10–13h MMADR Memory Mapped Range Address 00000000h RO, R/W<br />
14–2Bh — Reserved — —<br />
2C–2Dh SVID2 Subsystem Vendor Identification 0000h R/WO<br />
2E–2Fh SID2 Subsystem Identification 0000h R/WO<br />
30–33h ROMADR Video BIOS ROM Base Address 00000000h RO<br />
34h CAPPOINT Capabilities Pointer D0h RO<br />
35–3Dh — Reserved — —<br />
3Eh MINGNT Minimum Grant Register 00h RO<br />
3Fh MAXLAT Maximum Latency 00h RO<br />
40–43h — Reserved — —<br />
Intel ® 82<strong>945G</strong>/82<strong>945G</strong>/82<strong>945G</strong>C GMCH and 82<strong>945P</strong>/82<strong>945P</strong>L MCH Datasheet 191<br />
RO