Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...

Integrated Graphics Device (D2:F0) (Intel® 82945G/82945GC/ 82945GZ GMCH Only)
7.1.12 GMADR—Graphics Memory Range Address (D2:F0)
PCI Device: 2
Address Offset: 18h
Default Value: 00000008h
Access: RO, R/W/L
Size: 32 bits
The IGD graphics memory base address is specified in this register.
Bit Access &
Default
31:28 R/W
0h
27:4 RO
000000h
3 RO
1b
2:1 RO
00b
0 RO
0b
Description
Memory Base Address: Set by the OS, these bits correspond to address signals
31:28.
Address Mask: Hardwired to 0s to indicate a 256-MB address range
Prefetchable Memory: Hardwired to 1 to enable prefetching
Memory Type: Hardwired to 0 to indicate 32-bit address.
Memory/IO Space: Hardwired to 0 to indicate memory space.
7.1.13 GTTADR—Graphics Translation Table Range Address
(D2:F0)
PCI Device: 2
Address Offset: 1Ch
Default Value: 00000000h
Access: RO, R/W/L
Size: 32 bits
This register requests allocation for the Graphics Translation Table Range. The allocation is for
256 KB and the base address is defined by bits 31:18.
Bit Access &
Default
31:18 R/W
0000h
17:4 RO
0000h
3 RO
0b
2:1 RO
00b
0 RO
0b
Description
Memory Base Address (MBA): Set by the operating system, these bits
correspond to address signals 31:18.
Address Mask (ADMSK): Hardwired to 0s to indicate a 256 KB address range.
Prefetchable Memory (PREFMEM): Hardwired to 0 to prevent prefetching.
Memory Type (MEMTYP): Hardwired to 0s to indicate 32-bit address.
Memory/IO Space (MIOS): Hardwired to 0 to indicate memory space.
182 Intel ® 82945G/82945GZ/82945GC GMCH and 82945P/82945PL MCH Datasheet