Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...
Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ... Intel® 945G/945GZ/945GC/ 945P/945PL Express Chipset Family ...
Direct Media Interface (DMI) RCRB 6.1 DMI RCRB Configuration Register Details 6.1.1 DMIVCECH—DMI Virtual Channel Enhanced Capability Header MMIO Range: DMIBAR Address Offset: 000–003h Default Value: 04010002h Access: RO Size: 32 bits This register indicates DMI Virtual Channel capabilities. Bit Access & Default 31:20 RO 040h 19:16 RO 1h 15:0 RO 0002h Description Pointer to Next Capability: This field indicates the next item in the list. Capability Version: This field indicates support as a version 1 capability structure. Capability ID: This field indicates this is the Virtual Channel capability item. 6.1.2 DMIPVCCAP1—DMI Port VC Capability Register 1 MMIO Range: DMIBAR Address Offset: 004–007h Default Value: 00000001h Access: RO, R/WO Size: 32 bits This register describes the configuration of Virtual Channels associated with this port. Bit Access & Default 31:12 Reserved 11:10 RO 00b 9:8 RO 00b 7 Reserved 6:4 RO 000b 3 Reserved 2:0 R/WO 001b Description Port Arbitration Table Entry Size (PATS): This field indicates the size of the port arbitration table is 4 bits (to allow up to 8 ports). Reference Clock (RC): This field is hardwired for a clock of 10 ns. Low Priority Extended VC Count (LPEVC): This field indicates that there are no additional VCs of low priority with extended capabilities. Extended VC Count: This field indicates that there is one additional VC (VC1) that exists with extended capabilities. 162 Intel ® 82945G/82945GZ/82945GC GMCH and 82945P/82945PL MCH Datasheet
6.1.3 DMIPVCCAP2—DMI Port VC Capability Register 2 MMIO Range: DMIBAR Address Offset: 008–00Bh Default Value: 00000001h Access: RO Size: 32 bits Direct Media Interface (DMI) RCRB This register describes the configuration of Virtual Channels associated with this port. Bit Access & Default 31:24 RO 00h 23:8 Reserved 7:0 RO 01h 6.1.4 DMIPVCCTL—DMI Port VC Control MMIO Range: DMIBAR Address Offset: 00C–00Dh Default Value: 0000h Access: RO, R/W Size: 16 bits Bit Access & Default 15:4 Reserved 3:1 R/W 000b 0 Reserved Description VC Arbitration Table Offset (ATO): This field indicates that no table is present for VC arbitration since it is fixed. VC Arbitration Capability: This field indicates that the VC arbitration is fixed in the root complex. VC1 is highest priority and VC0 is lowest priority. Description VC Arbitration Select: This field indicates which VC should be programmed in the VC arbitration table. The root complex takes no action on the setting of this field since there is no arbitration table. Intel ® 82945G/82945G/82945GC GMCH and 82945P/82945PL MCH Datasheet 163
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Direct Media Interface (DMI) RCRB<br />
6.1 DMI RCRB Configuration Register Details<br />
6.1.1 DMIVCECH—DMI Virtual Channel Enhanced Capability<br />
Header<br />
MMIO Range: DMIBAR<br />
Address Offset: 000–003h<br />
Default Value: 04010002h<br />
Access: RO<br />
Size: 32 bits<br />
This register indicates DMI Virtual Channel capabilities.<br />
Bit Access &<br />
Default<br />
31:20 RO<br />
040h<br />
19:16 RO<br />
1h<br />
15:0 RO<br />
0002h<br />
Description<br />
Pointer to Next Capability: This field indicates the next item in the list.<br />
Capability Version: This field indicates support as a version 1 capability<br />
structure.<br />
Capability ID: This field indicates this is the Virtual Channel capability item.<br />
6.1.2 DMIPVCCAP1—DMI Port VC Capability Register 1<br />
MMIO Range: DMIBAR<br />
Address Offset: 004–007h<br />
Default Value: 00000001h<br />
Access: RO, R/WO<br />
Size: 32 bits<br />
This register describes the configuration of Virtual Channels associated with this port.<br />
Bit Access &<br />
Default<br />
31:12 Reserved<br />
11:10 RO<br />
00b<br />
9:8 RO<br />
00b<br />
7 Reserved<br />
6:4 RO<br />
000b<br />
3 Reserved<br />
2:0 R/WO<br />
001b<br />
Description<br />
Port Arbitration Table Entry Size (PATS): This field indicates the size of the<br />
port arbitration table is 4 bits (to allow up to 8 ports).<br />
Reference Clock (RC): This field is hardwired for a clock of 10 ns.<br />
Low Priority Extended VC Count (LPEVC): This field indicates that there are<br />
no additional VCs of low priority with extended capabilities.<br />
Extended VC Count: This field indicates that there is one additional VC (VC1)<br />
that exists with extended capabilities.<br />
162 Intel ® 82<strong>945G</strong>/82<strong>945G</strong>Z/82<strong>945G</strong>C GMCH and 82<strong>945P</strong>/82<strong>945P</strong>L MCH Datasheet