DATA SHEET - Glyn High-Tech Distribution
DATA SHEET - Glyn High-Tech Distribution DATA SHEET - Glyn High-Tech Distribution
HX8346-A(T)240RGB x 320 dot, 262K color, with internalGRAM, TFT Mobile Single Chip DriverList of Contents July, 20077.62 Internal Use 49 (R67h).................................................................................................................. 1227.63 Internal Use 20 (R68h).................................................................................................................. 1227.64 Internal Use 21 (R69h).................................................................................................................. 1237.65 Internal Use 27 (R2Fh) ................................................................................................................. 1237.66 Logic Function Register (R70h).................................................................................................. 1237.67 Serial Bus Interface control register (R72h) .............................................................................. 1267.68 Internal Use 31 (R73h).................................................................................................................. 1267.69 Internal Use 32 (R74h).................................................................................................................. 1267.70 Internal Use 33 (R75h).................................................................................................................. 1267.71 Internal Use 34 (R76h).................................................................................................................. 1277.72 Internal Use 35 (R77h).................................................................................................................. 1277.73 Internal Use 36 (R78h).................................................................................................................. 1277.74 Internal Use 37 (R79h).................................................................................................................. 1277.75 Internal Use 38 (R7Ah) ................................................................................................................. 1287.76 Internal Use 39 (R7Bh) ................................................................................................................. 1287.77 Backlight Control 1~7 Register (R7C~82h)................................................................................ 1287.78 Internal Use 47 (R83h).................................................................................................................. 1317.79 Internal Use 48 (R84h).................................................................................................................. 1318. Electrical Characteristic .................................................................................................................................. 1328.1 Absolute Maximum Ratings .......................................................................................................... 1328.5 Maximum Series Resistance ......................................................................................................... 1338.6 DC Characteristics ......................................................................................................................... 1348.7 AC CHARACTERISTICS ................................................................................................................. 1358.7.1 Parallel Interface Characteristics (8080-series MPU)............................................................ 1358.7.2 Parallel Interface Characteristics (6800-series MPU)............................................................ 1378.7.3 Serial Interface Characteristics .............................................................................................. 1388.7.4 RGB Interface Characteristics................................................................................................ 1398.7.5 Reset Input Timing ................................................................................................................. 1409. REFERENCE APPLICATIONS ......................................................................................................................... 1419.1 CONNECTION EXAMPLE WITH EXTERNAL COMPONENTS ..................................................... 1419.2 EXTERNAL COMPONENTS CONNECTION.................................................................................. 14110. Ordering information ..................................................................................................................................... 14211. Revision History............................................................................................................................................. 142Himax ConfidentialThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.3-July, 2007
HX8346-A(T)240RGB x 320 dot, 262K color, with internalGRAM, TFT Mobile Single Chip DriverList of FiguresJuly, 2007Figure 5. 1 Register read/write Timing in Parallel Bus System Interface (for I80 series MPU) ........ 33Figure 5. 2 GRAM read/write Timing in Parallel Bus System Interface (for I80 series MPU) ........... 34Figure 5. 3 GRAM read/write Timing in Parallel Bus System Interface (for I80 series MPU) ........... 35Figure 5. 4 Register read/write Timing in Parallel Bus System Interface (for M68 series MPU) ...... 36Figure 5. 5 GRAM read/write Timing in Parallel Bus System Interface (for M68 series MPU) ......... 37Figure 5. 6 GRAM read/write Timing in Parallel Bus System Interface (for M68 series MPU) ......... 38Figure 5. 7 Example of I80- / M68- System 16-bit Parallel Bus Interface......................................... 39Figure 5. 8 Input Data Bus and GRAM Data Mapping in 16-bit Bus System Interface with 16 bit-DataInput ( BS(2-0) = “000”).............................................................................................................. 39Figure 5. 9 Input Data Bus and GRAM Data Mapping in 16-bit Bus System Interface with (16 + 2)bit-Data Input ( BS(2-0) = “001”) ................................................................................................ 39Figure 5. 10 Output Data Bus and GRAM Data Mapping in 16-bit Bus System Interface with (16 + 2)bit-Data Input ( BS(2-0) = “001”) ................................................................................................ 40Figure 5. 11 Example of I80- / M68- System 18-bit Parallel Bus Interface ....................................... 41Figure 5. 12 Input Data Bus and GRAM Data Mapping in 18-bit Bus System Interface with (18)bit-Data Input ( BS(2-0) = “010”) ................................................................................................ 41Figure 5. 13Output Data Bus and GRAM Data Mapping in 18-bit Bus System Interface with (18)bit-Data Input ( BS(2-0) = “010”) ................................................................................................ 41Figure 5. 14 Example of I80- / M68- System 8-bit Parallel Bus Interface......................................... 42Figure 5. 15 Input Data Bus and GRAM Data Mapping in 8-bit Bus System Interface with ( 8 + 8 +8 )bit-Data Input ( BS(2-0) = “011”) ................................................................................................ 42Figure 5. 16 Output Data Bus and GRAM Data Mapping in 8-bit Bus System Interface with ( 8 + 8 +8 )bit-Data Input ( BS(2-0) = “011”) ................................................................................................ 43Figure 5. 17 Data Write Timing in Serial Bus System Interface........................................................ 45Figure 5. 18 Data Read Timing in Serial Bus System Interface........................................................ 47Figure 5. 19 RGB Interface Circuit Input Timing ............................................................................... 48Figure 5. 20 16 bit / pixel Data Input ................................................................................................. 49Figure 5. 21 18 bit / pixel Data Input ................................................................................................. 50Figure 5. 22 MCU to memory write/read direction ............................................................................ 51Figure 5. 23 MY, MX, MV Setting...................................................................................................... 52Figure 5. 24 Address Direction Settings............................................................................................ 53Figure 5. 25 Memory Map. (240RGBx320) .................................................................................... 54Figure 5. 26 ....................................................................................................................................... 55Figure 5. 27 ....................................................................................................................................... 55Figure 5. 28 ....................................................................................................................................... 55Figure 5. 29 ....................................................................................................................................... 56Figure 5. 30 ....................................................................................................................................... 56Figure 5. 31 ....................................................................................................................................... 57Figure 5. 32 ....................................................................................................................................... 57Figure 5. 33 ....................................................................................................................................... 58Figure 5. 34 ....................................................................................................................................... 58Figure 5. 35 LCD power generation scheme .................................................................................... 60Figure 5. 36 Various boosting steps.................................................................................................. 61Figure 5. 37 ....................................................................................................................................... 62Figure 5. 38 Structure of Grayscale Voltage Generator .................................................................... 63Figure 5. 39 Gamma Resister Stream and Gamma Reference Voltage .......................................... 65Figure 5. 40 Relationship between Source Output and Vcom ....................................................... 73Figure 5. 41 Relationship between GRAM Data and Output Level................................................ 73Figure 5. 42 Gamma Curve according to the GC0 to GC3 bit .......................................................... 74Figure 5. 43 Scan Function ............................................................................................................... 75Figure 5. 44 Oscillation Circuit .......................................................................................................... 76Figure 5. 45 Display On/Off Set Sequence .................................................................................... 77Figure 5. 46 Standby Mode Setting Sequence ................................................................................. 78Figure 5. 47 Power Supply Setting Flow........................................................................................... 79Figure 5. 48 OTP programming flow ................................................................................................. 81Himax ConfidentialThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.4-July, 2007
- Page 1 and 2: DATA SHEET( DOC No. HX8346-A(T)-DS
- Page 3: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 7 and 8: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 9 and 10: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 11 and 12: HX8346-A240RGB x 320 dot, 262K colo
- Page 13 and 14: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 15 and 16: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 17 and 18: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 19 and 20: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 21 and 22: NO.1NO.302PADA1PADB1DUMMYR1DUMMYR2P
- Page 23 and 24: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 25 and 26: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 27 and 28: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 29 and 30: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 31 and 32: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 33 and 34: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 35 and 36: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 37 and 38: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 39 and 40: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 41 and 42: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 43 and 44: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 45 and 46: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 47 and 48: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 49 and 50: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 51 and 52: HX8346-A(T)240RGB x 320 dot, 262K c
- Page 53 and 54: HX8346-A(T)240RGB x 320 dot, 262K c
HX8346-A(T)240RGB x 320 dot, 262K color, with internalGRAM, TFT Mobile Single Chip DriverList of FiguresJuly, 2007Figure 5. 1 Register read/write Timing in Parallel Bus System Interface (for I80 series MPU) ........ 33Figure 5. 2 GRAM read/write Timing in Parallel Bus System Interface (for I80 series MPU) ........... 34Figure 5. 3 GRAM read/write Timing in Parallel Bus System Interface (for I80 series MPU) ........... 35Figure 5. 4 Register read/write Timing in Parallel Bus System Interface (for M68 series MPU) ...... 36Figure 5. 5 GRAM read/write Timing in Parallel Bus System Interface (for M68 series MPU) ......... 37Figure 5. 6 GRAM read/write Timing in Parallel Bus System Interface (for M68 series MPU) ......... 38Figure 5. 7 Example of I80- / M68- System 16-bit Parallel Bus Interface......................................... 39Figure 5. 8 Input Data Bus and GRAM Data Mapping in 16-bit Bus System Interface with 16 bit-DataInput ( BS(2-0) = “000”).............................................................................................................. 39Figure 5. 9 Input Data Bus and GRAM Data Mapping in 16-bit Bus System Interface with (16 + 2)bit-Data Input ( BS(2-0) = “001”) ................................................................................................ 39Figure 5. 10 Output Data Bus and GRAM Data Mapping in 16-bit Bus System Interface with (16 + 2)bit-Data Input ( BS(2-0) = “001”) ................................................................................................ 40Figure 5. 11 Example of I80- / M68- System 18-bit Parallel Bus Interface ....................................... 41Figure 5. 12 Input Data Bus and GRAM Data Mapping in 18-bit Bus System Interface with (18)bit-Data Input ( BS(2-0) = “010”) ................................................................................................ 41Figure 5. 13Output Data Bus and GRAM Data Mapping in 18-bit Bus System Interface with (18)bit-Data Input ( BS(2-0) = “010”) ................................................................................................ 41Figure 5. 14 Example of I80- / M68- System 8-bit Parallel Bus Interface......................................... 42Figure 5. 15 Input Data Bus and GRAM Data Mapping in 8-bit Bus System Interface with ( 8 + 8 +8 )bit-Data Input ( BS(2-0) = “011”) ................................................................................................ 42Figure 5. 16 Output Data Bus and GRAM Data Mapping in 8-bit Bus System Interface with ( 8 + 8 +8 )bit-Data Input ( BS(2-0) = “011”) ................................................................................................ 43Figure 5. 17 Data Write Timing in Serial Bus System Interface........................................................ 45Figure 5. 18 Data Read Timing in Serial Bus System Interface........................................................ 47Figure 5. 19 RGB Interface Circuit Input Timing ............................................................................... 48Figure 5. 20 16 bit / pixel Data Input ................................................................................................. 49Figure 5. 21 18 bit / pixel Data Input ................................................................................................. 50Figure 5. 22 MCU to memory write/read direction ............................................................................ 51Figure 5. 23 MY, MX, MV Setting...................................................................................................... 52Figure 5. 24 Address Direction Settings............................................................................................ 53Figure 5. 25 Memory Map. (240RGBx320) .................................................................................... 54Figure 5. 26 ....................................................................................................................................... 55Figure 5. 27 ....................................................................................................................................... 55Figure 5. 28 ....................................................................................................................................... 55Figure 5. 29 ....................................................................................................................................... 56Figure 5. 30 ....................................................................................................................................... 56Figure 5. 31 ....................................................................................................................................... 57Figure 5. 32 ....................................................................................................................................... 57Figure 5. 33 ....................................................................................................................................... 58Figure 5. 34 ....................................................................................................................................... 58Figure 5. 35 LCD power generation scheme .................................................................................... 60Figure 5. 36 Various boosting steps.................................................................................................. 61Figure 5. 37 ....................................................................................................................................... 62Figure 5. 38 Structure of Grayscale Voltage Generator .................................................................... 63Figure 5. 39 Gamma Resister Stream and Gamma Reference Voltage .......................................... 65Figure 5. 40 Relationship between Source Output and Vcom ....................................................... 73Figure 5. 41 Relationship between GRAM Data and Output Level................................................ 73Figure 5. 42 Gamma Curve according to the GC0 to GC3 bit .......................................................... 74Figure 5. 43 Scan Function ............................................................................................................... 75Figure 5. 44 Oscillation Circuit .......................................................................................................... 76Figure 5. 45 Display On/Off Set Sequence .................................................................................... 77Figure 5. 46 Standby Mode Setting Sequence ................................................................................. 78Figure 5. 47 Power Supply Setting Flow........................................................................................... 79Figure 5. 48 OTP programming flow ................................................................................................. 81Himax ConfidentialThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.4-July, 2007