DATA SHEET - Glyn High-Tech Distribution
DATA SHEET - Glyn High-Tech Distribution DATA SHEET - Glyn High-Tech Distribution
HX8346-A(T)240RGB x 320 dot, 262K color, TFT Mobile Single Chip DriverD ) Timing Format of GRAM- Data ReadDATA SHEET V01SCL InputNCSStartEndSDI(Iutput)Start byteSDO(Output)Dummy read(8 bits)GRAM read 1 GRAM read 2 GRAM read 3 GRAM read 4Note:A RAM data read operation follows 8 bits dummy read operations .Note: This figure is specified transfer format (multi read)Figure 5. 18 Data Read Timing in Serial Bus System InterfaceHimax ConfidentialThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.47-July, 2007
HX8346-A(T)240RGB x 320 dot, 262K color, TFT Mobile Single Chip Driver5.1.2 RGB InterfaceDATA SHEET V01The HX8346-A supports the RGB interface for animated display data written. TheRGB interface can be selected by setting internal RGB_EN bit = 1. In RGB interfacethe display operations is executed in synchronization with the frame synchronizingsignal (VSYNC), line synchronizing signal (HSYNC) and dot clock (DOTCLK), and thedisplay data is input via RGB interface circuit without being written to the GRAM anddisplay directly. The display data are transferred in pixel unit via D23-0 input pins. Thedisplay data input is latched in the rising edge of DOTCLK (DPL bit = 0) or in thefalling edge of DOTCLK (DPL bit = 1) by the chip when ENABLE signal is validdescribed in Table 5.7EPL ENABLE Display0 0 Disable0 1 Enable1 0 Enable1 1 DisableTable 5. 7 EPL bit Setting and Valid ENABLE Signal(VSPL bit=0)VSYNCVertical Back porchDisplay areaDisplaperio ydHorizontalBackporchHSYNCDOTCLKENABLE( HSPL bit = 0 )( DPL bit = 0 )( EPL bit = 0 )D17-0Figure 5. 19 RGB Interface Circuit Input TimingHimax ConfidentialThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.48-July, 2007
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HX8346-A(T)240RGB x 320 dot, 262K color, TFT Mobile Single Chip Driver5.1.2 RGB Interface<strong>DATA</strong> <strong>SHEET</strong> V01The HX8346-A supports the RGB interface for animated display data written. TheRGB interface can be selected by setting internal RGB_EN bit = 1. In RGB interfacethe display operations is executed in synchronization with the frame synchronizingsignal (VSYNC), line synchronizing signal (HSYNC) and dot clock (DOTCLK), and thedisplay data is input via RGB interface circuit without being written to the GRAM anddisplay directly. The display data are transferred in pixel unit via D23-0 input pins. Thedisplay data input is latched in the rising edge of DOTCLK (DPL bit = 0) or in thefalling edge of DOTCLK (DPL bit = 1) by the chip when ENABLE signal is validdescribed in Table 5.7EPL ENABLE Display0 0 Disable0 1 Enable1 0 Enable1 1 DisableTable 5. 7 EPL bit Setting and Valid ENABLE Signal(VSPL bit=0)VSYNCVertical Back porchDisplay areaDisplaperio ydHorizontalBackporchHSYNCDOTCLKENABLE( HSPL bit = 0 )( DPL bit = 0 )( EPL bit = 0 )D17-0Figure 5. 19 RGB Interface Circuit Input TimingHimax ConfidentialThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.48-July, 2007