DATA SHEET - Glyn High-Tech Distribution
DATA SHEET - Glyn High-Tech Distribution DATA SHEET - Glyn High-Tech Distribution
HX8346-A(T)240RGB x 320 dot, 262K color, TFT Mobile Single Chip DriverWrite to the graphic RAM (18-bit or 16-bit collective)DATA SHEET V01NCSDNC_SCLRW_NRDE_NWRD23-0 orD17-0 orD15-0"22"h write to index register Display data write to RAM Display data write to RAMnth pixel, Address = N (n+1) pixel, Address = N +1Read the graphic RAM (18-bit interface)NCSDNC_SCLRW_NRDE_NWRD23-0 orD17-0 orD15-0"22"hdummy read data1st read datanth pixel, Address = Nnth pixel, Address = NWrite to the graphic RAM (16-bit + 2 bit)NCSDNC_SCLRW_NRDE_NWRD15-0 and D1-0,orD15-0 and D7-0"22" h 1st write data 2nd write data 1st write data 2nd write data 1st write data 2nd write datanth pixel ; Address = N(n+1)th pixel ; Address = N+1(n+2)th pixel ; Address = N+2NCSRead the graphic RAM (16-bit )DNC_SCLRW_NRDE_NWRD15-0 and D1-0,orD15-0 and D7-0"22" h 1st write data 2nd write data 3rd write data 1st write data 2nd write datadummyread datanth pixel ; Address = N(n+2)th pixel ; Address = N+23rd write dataFigure 5. 5 GRAM read/write Timing in Parallel Bus System Interface (for M68 series MPU)Himax ConfidentialThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.37-July, 2007
HX8346-A(T)240RGB x 320 dot, 262K color, TFT Mobile Single Chip DriverDATA SHEET V01Figure 5. 6 GRAM read/write Timing in Parallel Bus System Interface (for M68 series MPU)Himax ConfidentialThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.38-July, 2007
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HX8346-A(T)240RGB x 320 dot, 262K color, TFT Mobile Single Chip DriverWrite to the graphic RAM (18-bit or 16-bit collective)<strong>DATA</strong> <strong>SHEET</strong> V01NCSDNC_SCLRW_NRDE_NWRD23-0 orD17-0 orD15-0"22"h write to index register Display data write to RAM Display data write to RAMnth pixel, Address = N (n+1) pixel, Address = N +1Read the graphic RAM (18-bit interface)NCSDNC_SCLRW_NRDE_NWRD23-0 orD17-0 orD15-0"22"hdummy read data1st read datanth pixel, Address = Nnth pixel, Address = NWrite to the graphic RAM (16-bit + 2 bit)NCSDNC_SCLRW_NRDE_NWRD15-0 and D1-0,orD15-0 and D7-0"22" h 1st write data 2nd write data 1st write data 2nd write data 1st write data 2nd write datanth pixel ; Address = N(n+1)th pixel ; Address = N+1(n+2)th pixel ; Address = N+2NCSRead the graphic RAM (16-bit )DNC_SCLRW_NRDE_NWRD15-0 and D1-0,orD15-0 and D7-0"22" h 1st write data 2nd write data 3rd write data 1st write data 2nd write datadummyread datanth pixel ; Address = N(n+2)th pixel ; Address = N+23rd write dataFigure 5. 5 GRAM read/write Timing in Parallel Bus System Interface (for M68 series MPU)Himax ConfidentialThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.37-July, 2007