DATA SHEET - Glyn High-Tech Distribution
DATA SHEET - Glyn High-Tech Distribution DATA SHEET - Glyn High-Tech Distribution
HX8346-A(T)240RGB x 320 dot, 262K color, TFT Mobile Single Chip Driver5.1.1.1 Parallel Bus System InterfaceDATA SHEET V01The input / output data from data pins (D17-0) and signal operation of the I80/M68series parallel bus interface as listed in Table 5.4 and Table 5.5.Operations E_NWR RW_NRD DNC_SCLWrites Indexes into IR 0 1 0Reads internal status 1 0 0Writes command into register or data into GRAM 0 1 1Reads command from register or data from GRAM 1 0 1Table 5. 4 Data Pin Function for I80 Series CPUOperations E_NWR RW_NRD DNC_SCLWrites Indexes into IR 1 0 0Reads internal status 1 1 0Writes command into register or data into GRAM 1 0 1Reads command from register or data from GRAM 1 1 1Table 5. 5 Data Pin Function for M68 Series CPUWrite to the registerNCSDNC_SCLRW_NRDE_NWRD7-0 "index" write to index register Command write to the registerRead the registerNCSDNC_SCLRW_NRDE_NWRD7-0 "index" write to index register Command read f rom the registerFigure 5. 1 Register read/write Timing in Parallel Bus System Interface (for I80 series MPU)Himax ConfidentialThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.33-July, 2007
HX8346-A(T)240RGB x 320 dot, 262K color, TFT Mobile Single Chip DriverWrite to the graphic RAM (18bit interface)DATA SHEET V01NCSDNC_SCLRW_NRDE_ NWRD23- 0 orD17- 0 orD15-0"22" h write to index register Display data write to RAM Display data write to RAMnth pixel, Address = N (n+1 ) pixel, Address = N +1Read the graphic RAM(18bit interface)NCSDNC_SCLRW_NRDE_ NWRD23- 0 orD17- 0 orD15-0"22"hdummy read datanth pixel, Address = N1 st read datanth pixel, Address = NWrite to the graphic RAM(16 + 2 bit collective)NCSDNC_SCLRW_NRDE_ NWRD15- 0 and D1-0,orD15- 0 and D7-0"22" h 1 st write data 2 nd write data 1 st write data 2 nd write data 1 st write data 2 nd write datanth pixel ; Address = NRead the graphic RAM (16 + 2 bit collective)NCS(n+1) th pixel ; Address = N+1(n+2) th pixel ; Address = N+2DNC_SCLRW_NRDE_ NWRD15- 0 and D1-0,orD15- 0 and D7-0"22" h1 st read data2 nd readdataDummyReadDatanth pixel ; Address = NFigure 5. 2 GRAM read/write Timing in Parallel Bus System Interface (for I80 series MPU)Himax ConfidentialThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.34-July, 2007
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HX8346-A(T)240RGB x 320 dot, 262K color, TFT Mobile Single Chip DriverWrite to the graphic RAM (18bit interface)<strong>DATA</strong> <strong>SHEET</strong> V01NCSDNC_SCLRW_NRDE_ NWRD23- 0 orD17- 0 orD15-0"22" h write to index register Display data write to RAM Display data write to RAMnth pixel, Address = N (n+1 ) pixel, Address = N +1Read the graphic RAM(18bit interface)NCSDNC_SCLRW_NRDE_ NWRD23- 0 orD17- 0 orD15-0"22"hdummy read datanth pixel, Address = N1 st read datanth pixel, Address = NWrite to the graphic RAM(16 + 2 bit collective)NCSDNC_SCLRW_NRDE_ NWRD15- 0 and D1-0,orD15- 0 and D7-0"22" h 1 st write data 2 nd write data 1 st write data 2 nd write data 1 st write data 2 nd write datanth pixel ; Address = NRead the graphic RAM (16 + 2 bit collective)NCS(n+1) th pixel ; Address = N+1(n+2) th pixel ; Address = N+2DNC_SCLRW_NRDE_ NWRD15- 0 and D1-0,orD15- 0 and D7-0"22" h1 st read data2 nd readdataDummyReadDatanth pixel ; Address = NFigure 5. 2 GRAM read/write Timing in Parallel Bus System Interface (for I80 series MPU)Himax ConfidentialThis information contained herein is the exclusive property of Himax and shall not be distributed, reproduced, or disclosedin whole or in part without prior written permission of Himax.-P.34-July, 2007
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