Dynamic Shift Registers - Bitsavers - Trailing-Edge

ROMsMM42111MM52111024-bit read only memorygeneral descriptionThe MM4211/MM5211 is a 1024-bit static readonly memory. It is a P-channel enhancement modemonolithic MOS integrated circuit utilizing lowthreshold technology. The device is a non-volatilememory organized as 256-4 bit words. Programmingof the memory contents is accomplished bychanging one mask during device fabrication.features• Bipolar compatibility• High speed operation• Static operation+5V, -12V operation< 700 ns typno clocks required• Common data busing• Chip enable output controlapplications• Code conversion• Random logic synthesis• Table look-up• Character generators• Micro-programmingoutput wire ANDcapabilityblock and connection diagramsDual-In-Line PackageINPUTS(LSB) A,SENSEAMPLIFIERSOUTPUTS t>---B,INPUT A3INPUT A216 Voo15 INPUT A.MEMORYADDRESSDECODERMEMORY>---B,>---B3INPUT AlOUTPUT 8,OUTPUT 8214 INPUT A513 INPUT A612 INPUT A7>---B,OUTPUT 83*The output is Enabled bV applyinga logic "1" to the Chip Enable line.CHIP *ENABLEtThe outputs are connected to VDnthrough an internal-MQS resi.torwhen Disabled.OUTPUT 84 7Vss10 CHIPENABLEL8 ______ --' INPUT ABTOP VIEWtypical application256 x 4 Bit ROM Showing TTL Interface-12V--------~------------------------------------~~f_~~_,.5VA,Vss6.0K 6.8K S.8K 6.aKINPUTSCHIPENABLE10VGG11B,B3A,12B,OUTPUTSANY OIl/TTLlOGIC13MM4211! MM5211B,14ANY OTl/TTllOGIC15tVDO16II175