Dynamic Shift Registers - Bitsavers - Trailing-Edge

ROMsMM4210/MM5210 1024-bit read only memorygeneral descriptionThe MM4210/MM5210 is a 1024-bit static readonly memory. It is a P-channel enhancement modemonolithic MOS integrated circuit utilizing lowthreshold technology. The device is a non-volatilememory organized as 256-4 bit words. Programmingof the memory contents is accomplished bychanging one mask during device fabrication. Customerprograms may be supplied in a tape, card, orpattern selection format.features• Static operation• Common data busing• Chip enable output control.applications• Code conversion• Random logic synthesis• Table look-up• Bipolar compatibility • Character generators• High speed operation 500 ns typ • Micro-programming.no clocks requiredoutput wire ANDcapabilityblock and connection diagramsDual-In-Line PackageINPUTS(LSB) A,SENSEAMPLIFIERSOUTPUTS tB,INPUT II:! 1 16 VDDINPUT A, 2A,INPUT A,A,MEMORYADDRESSDECODERMEMORYB,B,OUTPUT B, 4OUTPUT B,SA,*The output is Enabled by applyinga logic "1" to the Chip Enable line.CHIP *ENABLEB.tThe outputs are cDnnacttd to VDDthrough an internal MOS resistorwhen Disabled.OUTPUT B, B 11 VaGOUTPUT B. 7 10 CHiPENABLEV •• I9 INPUT As~---...TOP VIEWtypical application256 x 4 Bit ROM Showing TTL InterfaceINPUTS-12V----....--------------------4.........- .......,+12v----+---4 .......----4.....----------.,oMBl10 DR OMBl12TTL GATES3.OK~-l-~~~jt-~A~8raa----~~V~ss~~3.0K"JO-ir-_ ....______A~l 123.0K CHiPENABLE 10 1 B.VGG 11 6 B,13MM42101MM52105!"B,B,UKUKUK...... ---t-... -----tUK+5VOUTPUTS14oTLiTTL LOGIC15Voo* Resistont"ue can wry from BIOn to 30 .. n. I71