Dynamic Shift Registers - Bitsavers - Trailing-Edge

Dynamic Shift RegistersMM4104/MM5104 dynamic shift registergeneral descriptionThe MM4104/MM5104 360/359,228/287,40/32bit dynamic shift register is a monolithic MOSintegrated circuit utilizing p-channel enhancementmode low threshold technology to achieve bipolarcompatibility. The register lengths are lengthenedor shortened by hard wiring the length select lineto VGG or Vss. The lengths available are: 40,288, 328, 360, 400, 560, 688; or 32, 287, 319,359, 391, 446, 678.features• DTL/TTL compatibility+5V, -12V powersupply. No pull-upor pull-downresistors requ ired• Multiple length registers Electrically adjustable360/359, 288/287, 40/32 bitregisters• Wide frequency rangeapplications• Data store• CRT displays• Business machine250 Hz min. guar.at 25°C2.5 MHz max. guar.over temp.connection diagramMetal Can PackageDATA OUTPUT 2(40132 OUT)DATA INPUT lA(360.288 IN)VssTOP VIEWtypical applicationsTTL/MOS Interface+5VrL, J_ r------uu........... r--.... 17 1(SHOAT) 0 ,(LONG)VaG Vss+5VNOTE:VGG on pin 3 results in a 28S·bit registerbetween pin 1 and pin 4 and a 281·bitregister between pins 6 and 4. The unusedinput (6 or 7) must be returned to Vss.Also, there is a 32·bit register betweenpins 1 and 2.Vss on pin 3 results in a l60·bit registerbetween pin 7 and pin 4 and a 359·bitregister between pins 6 and 4. The unusedinput (6 or 11 must be returned to Vss.Also, there is a 40·bit register between pins1 and 2.45