Dynamic Shift Registers - Bitsavers - Trailing-Edge

Dynamic Shift RegistersMM4013/MM5013 1024-bit dynamic shift register/accumulatorgeneral descriptionThe MM4013/MMS013 1024-bit dynamic shiftregister/accumulator is an MOS monolithic integratedcircuit using P-channel enhancement modelow threshold technology to achieve direct bipolarcompatibility_ There is on-chip logic to load andrecirculate data, and a read control for enabling thebus-ORableTRI-STATETM push pull output stage.features• Bipolar compatibility Standard +SV, -12Vpower suppliesNo pull down orpull up resistorsrequired• Package option TO-99 ormolded 8-pin mini-DIP• Low clock capacitance 160 pF max• Wide frequency range rf>f min = 400 Hz @2SOC typrf>f max = 2.S MHzover temp. guaranteed• Built-in recirculate Exclusive-OR andrecirculate loop on-chip• TRI-STATE output Allows wire-OR busstructure on output• Full temperature operationMM4013MMS013applications-SSOC to +12SoC- 2SoC to +70°C• "Silicon Store" replacement for drum and discmemories• File memories• CRT refreshconnection diagramsTO-l00 PackageDual-In-Line PackageVooWRITECONTROLDATAINAEADCONTROL\flOUT 36 OUTPUTV"TOP VIEWV" 4TOP VIEW5 III.".typical applicationsTTL/MOS Interfacetruth tableL~.£~.JIIL-----"~F·~----.J.r.. .-------------,.~ IIII I.'-1III2--1 MM40UIMM5CIl IL - - - - - '1'= ----- .J(Positive Logic)Logic "1" = V,H = Logical HIGH LevelLogic "0" = V'L = Logical LOW LevelWRITE READ FUNCTION0 00 11 01 1RecirculateOutput DisabledRecirculateOutput EnabledWrite ModeOutput DisabledWrite ModeOutput Enabled-12V.'111%2S