Dynamic Shift Registers - Bitsavers - Trailing-Edge

new devices. The external gating functions shownin Figure 2 are not needed for these fonts whenthe MM5240 and MM5241 are used. The "assem·bly" of the dot patterns is taken care of in theprogramming of the ROMs. However, to generate alarge font, such as 8 x 10 or 12 x 16, with the newROMs will require operation of two to four ROMs.Each MM521 in the SK0001 raster scan kit canstore 2564-bit dot patterns. As the inset letter"N" in Figure 2a indicates, the MK001 ROMstores the first four 4-dot line segments of each ofthe 5 x 7 characters, the M K002 stores 4-bitsegments of the other three-dot lines, and M K003suppl ies the fifth bit of each of the seven-dot lines.All ROMs are addressed simultaneously.The 6-bit ASCII code was devised to select 64 (2 6 )characters. However, an 8-bit address is used toselect the dot lines and the 6-bit ASCII code fromthe 256 (2 8 ) word locations in each ROM. Thesetwo additional bits Clre supplied by the A and Boutputs of a TTL binary counterDM8533 (SN7493) and the counter's C output isused to commutate the MK001 and MK002. TheROMs are enabled by an output at the TTL logical"0" level. Thus, with the gating shown, theMK001 is enabled during the first four of sevenline-rate clock inputs and the MK002 during theremaining three inputs.The MK003 is continuously enabled by groundingthe chip-enabled pin, CEo It must generate a 1-bitoutput for each of the 7 x 64 dot lines in the64-character set, which implies a 9-bit address.Rather than produce a special ROM just for thisfunction-which would make it expensive-theMM521 was programmed to generate 2562-bitoutputs from the 8-bit address. The counter's Coutput simply gates out the unwanted bit.For a 5 x 7 font, the new single-chip charactergenerators are simply programmed to generate all5 bits in each dot line, from a 9-bit address. Standardprogramming provides the 64-characterASCII set, but special characters can be substitutedby changing the stored dot patterns. Thereprogramming process consists of altering anetching mask that controls gate insultation thicknessin the MaS field effect transistors of thestorage array. If the oxide is left thick, the transistorwill not switch when selected by the decodinglogic, generating a "0" output from that location.Figure 9 indicates why the storage capacity of theMM5240 is 5 x 8 x 64 rather than 5 x 7 x 64-eachROM can generate half of the 8 x 10 x 64 characterset. The ROMs can be addressed simultaneously,as before, and be com mutated by thecontrol logic to put out the 8-dot horizontal linesin the correct sequence. For very high speed charactergeneration, the addressing of the ROMs canbe skewed or overlapped so that the outputs fromone are generated while the inputs to the other arebeing decoded. The only real limitations to thecharacter generation rates achievable with suchtechniques are the speed of the bit serializing logicand the bandwidth of the video circuitry.• •:. : MM524t-l-·J .. -I-~• •• MMS241; .; 150 8)8 x 10 RASTER SCAN CHARACTER.......I• I •MMSZ41 i I : MM5241(8x6):: ~.6)______ ".J!!"!!".!!. ____ _·. , .••• ¥ •••MM5Z41 I: MM524118x6). : (BII6)16 II 12 VERTICAL SCANFigure 9. Multiple ROM Character FontsCONTROL LOGICStarting with the dot/character or dot and spacecounter in Figure 7, the counter moduli are set toaccomplish the following functions:• The dot and space counter determines the numberof horizontal spacing bits between char- .acters in the character row on the display. Itsoutput is loaded into the parallel inputs of theDM8590 serial-in/parallel-out shift register. Fora 5 x 7 font, for example, a modulus of sixinserts one spacing bit (logical "0" bit) betweeneach 5-dot group in the serialized stream.During line recirculation periods, this counteralso drives the N counter at the character sh iftrate of the N register.• The N counter causes the line select counter tochange state at the end of every recirculation ofthe row data in the N register. It generates apulse at intervals of 6N dot clock periods(assuming one spacing bit).• The line select counter generates seven sets ofthe three address bits that sequence dot-lineselection from the ROM.• A character line counter is needed in someraster-scan displays to keep track of which pageline has just been generated. This time is signifiedby the C or D output of the line selectcounter.Outputs of the first three counters actuate theregister clock drivers, keeping the line select bits insynch with the data code. If the line select counteris a 4-bit binary device, eight states are available onthe ABC outputs (000 through 111). The D outputcan be used to provide a ninth state and thereset function. Only seven states are needed forline select, so the eighth and ninth states providethe interval needed for loading the N register fromthe M-N register, as previously described.»zt~o-t'::rCDen