Dynamic Shift Registers - Bitsavers - Trailing-Edge

I, 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1.~ 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1o 0 1 1 0 0 1 1'. 0 1 0 1 o 1 0 1 o 1 0 1 0 1 0 1CHAR 0 B 4 12 2 10 6 14 1 9 5 13 3 " 7 15ROW.~ 'e1 0 i........::::: :..!.:: .. : .. ::::i:: :::.: ... :.. ...... :: .:: ....: ...: .... : .. :.... ..i·· i::: I·::·:::: .... : : ..... : ...... :: ... :.... .... . .......: :: ....... .... :::: ... = .... .Figure 3a. Raster Scan Character Font'0 0 0 -0 0 0 0 0 0 1 1 1 1 1 1., 0 0 0 0 1 1 1 1 0 0 0 0 1 1'. 0 0 1:::;. !.. i.i·::·· :..: ." 0 1 o ,. 0 1 o 1 0 1 0 1CHAR 0 8 4 12 2 10 6 14 1 9 5 13 3 11 7 15ROW'. "..... : :..: :.: :...:: ::.:. : :. :.... ........:.::.: : i .. ·· i .... ;:::: : . .: r·· ! ·:i r··i J... . :. ::...... . ··i·· :::.: ........ ....... ..I ....:.:: : i ....:..:: .....:... : ...1 0 • .:.. : ••••••••• : ··.r·f::i::::: .. . ..:: .. : :... . ... :: ...:.... :..:.... ........t::. i : i i .... :......::...::.. . ... : : ... : : ........... .: ... : ..... i ... ::.: .... : ......... .Figure 3b. Vertical Scan Character Font. .. :: .... :J>Z~o....j:rCDC/)"0"0...oQ)n:rg(1:rQ)...Q)n....CD...C)CD::lCD....Q)....o ...enbits needed to select the individual lines or columnsof dots that form the characters in the6 LINE ASCII {C ~INPUT ~LINE ADDRESS 0-INPUTS ::L..--r---lCHIP ENABLE 0--_ ... 1~Of-of-o DATA1-0 OUTPUTSt-o1-0Figure 4a. MM5240 Raster Scan Character GeneratorElement6 LINE ASCII {-EINPUT ;::_0-VOGIt-o~COLUMN ADDRESS ~ ~INPUTS 0:: .....'----,.----'1-0CHIP ENABLE 0--_ ... 11-0 DATAf-o OUTPUTSFigure 4b. MM5241 Vertical Scan Character GeneratorElement5 x 7 x 64 dot matrix. The output bits formingeach dot line or column are presented in parallel.The parallel outputs are serialized by a TTL registerand used to control the CRT beam or theprinter mechanism. To simplify the selectionprocess, the ROMs are programmed to generatethe lines or columns in the correct sequence whenaddressed by the sequential outputs of a TTLcounter.As for registers, they became quite popular during1969 because a CRT refresh memory of up toabout 5,000 bits-enough for a display of morethan 800 characters-could be built less expensivelywith MaS dynamic registers than with delaylines. 2 This was achieved with registers containing200 storage stages per chip. During 1970, dynamicregisters up to 512 bits long will go into massproduction, giving rise to predictions of significantsavings in refresh memory costs. Whether savingsthat large can actually be realized will dependupon how quickly the new devices catch on and gointo volume production.Aside from cost per function, other pertinent considerationare temperature sensitivity and functionalflexibility. In a refresh memory, registeroutputs are fed back to the inputs. On each recir-231