11.07.2015 Views

Dynamic Shift Registers - Bitsavers - Trailing-Edge

Dynamic Shift Registers - Bitsavers - Trailing-Edge

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performance characteristics! 100,.J'a:Q.J'~. 10...wQwen'"~ 1.0!;::IEx 0.1Guaranteed Maximum DataPhase Delay Times vsTemperature (Note 11""'- ¢I>w = 130 nsI- ¢I, = ¢t, = 10 ns'\~ -60 -20 20 60AMBIENT TEMPERATURE, TA (OC)100!... >~:::>'" we:'" ....'"Q::IE:::>i!lzi10klk10010Guaranteed Minimum DataFrequency vs Temperature(Note 1)./ ./¢d OR ¢d = 10 ns:/¢d =¢d - f---¢I>w = 130 ns =¢t, = ¢t, = 10 ns-1-60 -20 20 60 100AMBIENT TEMPERATURE. TA (OC)switching time waveformsMultiplexed 4-Bit MOS <strong>Shift</strong> RegisterBIT TIMES I BIT 1I BIl2 I BIT 3 8114I I I I I I I I I"-U I LJ LJ LJ I LJ I LJ r-+-I ---lLJ II I I I I I I I I I I I I I" I LJ I LJ I U I LJ I LJ I LJ I U-I I I I I I I I I I I I I I"1" "1"----F""l DATA IN I DA.~rlN fFl I I I I I IDATA IN 1 2"0"II I"1" I I I "1" I I I I I IDATA OUTShown is a simplified illustration of the timing ofa 4-bit multiplexed register showing input outputrelationships with respect to the clock. If dataenters the register at cf>, time, it exits at cf>, time.(8eginning on cf>l's negative going edge and endingon the succeeding cf>2's negative going edge.)timing diagramIBITI IBIT2I81TH8IT"+1 81TN+2BIT IBI12C(OCK'l~_-1 ~: L_[ ,:-U---------~~~I -+1 ~!- I ~ :: II-/Ipw--!--.,~CLOCKPIERIOD I ¢1j-lr -tt--¢t,.:~I",,'14>z II ':II~V,"CLOCK '*1 'j- __ 90% 911% -- l 90% -- ---\It.t.-+-l r-::: I I ~~ I ---l ¢Pw I--DATA PEIUOO--i ::;;;;1. X"------------~~----------r-+-----1------VWi\.iNiiTi'" INBIU l I .... H -I \-- --I r-- IpoII. Vl~;,.:;:;;.;------------------f~----------"CVOH-------------;lIl--------I\-oiiTii;;-J OUTBITZ VOL14

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