Dynamic Shift Registers - Bitsavers - Trailing-Edge

absolute maximumData and Clock Input Voltagesand Supply Voltages withRespect to V 55Power DissipationOperating Temperature RangeStorage Temperature RangeLead Temperature (Soldering, 10 sec)ratings+ 0.3V to -20V600 mWat TA = 25°C-25°C to +70°C-65°C to +160°C300°Celectrical characteristicsT A = _25° C to +70° C, Vss = 5V ±5%, V DO = -5V ±5% or -9V ±5%, unless otherwise specified.PARAMETERData I nput LevelsLogical LOW Level (V,dLogical HIGH Level (V'H)Data I nput Leakage CurrentInput CapacitanceClock Input LevelsLogical LOW Level (V dLogical HIGH Level (VH)Logical LOW Level (V dLogical HIGH Level (VH)Clock Leakage CurrentClock CapacitanceData Output LevelsLogical LOW Level (VodLogical HIGH Level (VOH )Logical LOW Level (VOL)Logical HIGH Level (VOH )Logical HIGH Level (V OH)'Logical HIGH Level (VOH )Power Supply Current (lDD)Data Output Leakage CurrentInternal Resistor (MM5024A)Output CapacitanceCONDITIONSV'N = -15V, TA = 25°C, All Other Pins GNDV'N = VssVDo=-5V±5%V DD = -9V ± 5%Min VL, TA = 25°CV = VssRLl = 3k to V DD , IOL = 1.6 mA, V DD = -5V ± 5%RLl = 3k to VDD,loH = 100MARL1 = 4.7k to V DD , IOL = 1.6 mA, V DD = -9V ± 5%RLl = 4.7k to V DD , IOH = 100 MARL2 = 4.7k to V DD , V DD = -5V ± 5%RL2 = 6.2k to V DD , V DD = -9V ± 5%RL3 = 3.9k to VssT A = 25°C, V DD = -5V ± 5%Output Logic "0", 5 MHzData Rate; 33% Duty Cycle,Continuous Operation, V L = V S5 -TA = O°C17VTA = 25°C, V DD = -9V ±5%Output at Logic "0", 3 MHzData Rate, 26% Duty Cycle,Continuous Operation, VL = Vss - 14.7VT A = O°CVOUT = O.OV, T A = 25°C, Vl = V2 = VS5 - 10V,All Other Pins +5VT A =25°CVOUT = V5S , f = 1 MHzMINVss - 10.0Vss - 1.7Vss - 17Vss - 1Vss - 14.7Vss - 12.42.4Vss -l.6Vss - 1.63.7TYPVV...3:3:nA ~pFV0~l>V3:VV 3:(J'1nA0pFVVVVVVmAmAmAmAnAN~l>ac characteristics TA = -25°C to +70°C, Vss = 5V ± 5%PARAMETERMINVoo = -5V ± 5%MAXVoo = -9V ± 5%MINMAXUNITSClock Frequency (