Dynamic Shift Registers - Bitsavers - Trailing-Edge

ROM Code ConvertersMM4230FE/MM5230FE selectric-to-EBCDIC/EBCDIC-to-selectric code convertergeneral descriptionThe MM4230FE/MM5230FE provides for the conversionof I BM Selectric Correspondence Code toExtended Binary Coded Decimal Interchange Code(EBCDIC) in both directions. These two decodersare contained on a monolithic MOS device.The Selectric-to-EBCDIC converter is located inbinary addresses 0 through 127. Input bit A7 isused as a single line command to determinewhether upper (denoted by a "1") or a lower(denoted by a "0") case has been selected.The EBCDIC-to-Selectric converter is located inbinary addresses 128 through 255. Since not allEBCDIC control commands have Selectric codecou nterparts, it is not necessary to encode bitposition 0 (A8), which is used instead as the codeconverter selection bit. In addition to the SelectricCorrespondence output code bits there is a bit toindicate upper or lower case. The odd parity bitgenerated does not account for the case bit.device characteristicsFor full electrical, environmental, and mechanicaldetails refer to the MM42301MM5230 2048-bit readonly memory data sheet.typical applicationconnection diagram-12Vdc---____________-4I~.....__.+12Vdt:----~ ......... __.+5Vdc--+---+--+-i--------II--+-i---.--OM8812TTL GATESl.OK,TYPICAL, v" 12B LINESA,3A,2A,1A,21A,20vD:F14MM4230FE/MM5230FE16,7VGG"""""UK,TYPICAL,8 LINES1O-__ -I__A""I 6 19 91-';...' ___-1_-1k> __ ~-~A~7 18 lnl-'~'----I--IJC> __ -4~_A"ia 11-12Vdt·CHIPENABlE~~=-:'+'2Vdc"";;;;;';;':';==--Il1t-·;...· ----4..--tDM140D SERIESTTL GATESA, 14 VooA, 2l NtA, Nt""""""""V"10 15A,A,A,A,A.16 VGl;"MODECONTROlCHIP11ENABLE12 IJA'TDPVIEWLOliclev,liDTl!TTL (ellcept at MOS/ROM interflce)LOlic"I",+5V,nom.lQlic"O",ground,nom.MOSfROM Inpuu& OutputsLogic "1", more negative. logic "0", mon positive·ChipEnlble=Logic"I"toobtainoutpuh202