Dynamic Shift Registers - Bitsavers - Trailing-Edge

application information (con't)For small values of C L , equation above predictsoptimistic values for t r. The graph on page 132shows typical rise times for various load capacitances.The output fall time (see Graph) may be predictedby:tf = 2.2R(Cs + ~6.0 Clock OvershoothF E + 1The output waveform of the MH0026 can overshoot.The overshoot is due to finite inductance ofthe clock lines. It occurs on the negative goingedge when Q 7 saturates, and on the positive edgewhen Q 3 turns OFF as the output goes throughV+ - Vbe . The problem can be eliminated byplacing a small series resistor in the ouput of theMH0026. The critical valve for Rs = 2VLCL whereL is the self-inductance of the clock line. Inpractice, determination of a value for L is ratherdifficult. However,Rs is readily determined emperically,and values typically range between 10 and51 ohms. Rs does reduce rise and fall times asgiven by:7.0 Clock Line Cross TalkAt the system level,voltage spikes from ¢l may betransmitted to 1>2 (and vice-versa) during thetransition of 1> 1 to MaS logic "1". The spi ke isdue to mutual capacitance between clock lines andis, in general, aggravated by long clock lines whennumerous registers are being driven. TransistorsQ3 and Q4 on the 1>2 side of the M H0026 areessentially "OFF" when 1>2 is in the MaS logic"0" state since only micro-amperes are drawnfrom the device. When the spike is coupled to ¢2,the output has to drop at least 2 VB E before Q 3and Q 4 come on and pull the output back to V+A simple method for eliminating or minimizingthis effect is to add bleed resistors between theMH0026 outputs and ground causing a current ofa few milliamps to flow in Q4. When a spike iscoupled to the clock line Q 4 is already "ON" witha finite hfe' The spike is quickly clamped by Q4'Values for R depend on layout and the number ofregisters being driven and vary typically between2k and 10k ohms.8.0 Power Supply DecouplingPower supply decoupling is a widespread andaccepted practice. Decoupling of V+ to V- supplylines with at least 0.1 /IF non inductive capacitorsas close as possible to each MH0026 is stronglyrecommended. This decoupling is necessarybecause otherwise 1.5 ampere currents flow duringlogic transition in order to rapidly charge clocklines.3::x:oN0).........3::x:oN0)"137