Dynamic Shift Registers - Bitsavers - Trailing-Edge

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typical applicationsIfOP~T"IfOPUT"DC Coupled MOS Clock DriverTransistor Coupled MOS Clock Driver}'""'''REGISTERS3:J:oN0)........3:J:oN0)(")Logically Controlled AC Coupled Clock Driver}TO ~OOITIOII"'"SHIFTAEGISHRS'O_----1~CUICKINPUT_2Io• b O~'SHOT OUTPUT _ ADJPUL$EWIOTHPHASE ONE OUTPUTPIIASE TWO OUTPUTPrecharge Driver for MOS RAM Memories."",,""'---l-.l---"'"-----------'--------jac test circuitswitching time waveforms~ltF ==~VMH'I'W=U",~= ~ ,len,133
uCDNoJ:~........CDNoJ:~application information1.0 IntroductionThe MH0026 is capable of delivering 30 wattspeak power (1.5 amps at 20V needed to rapidlycharge large capacitative loads) while its package islimited to the watt range. This section describesthe operation of the circuit and how to obtainoptimum system performance. If additional designinformation is required, please contact your localNational field application engineer.2.0 Theory of OperationConventional MOS clock drivers like the MH0013and similar devices have relied on the circuitconfiguration in Figure 1. The AC coupling of aninput pulse allows the device to work over a widerange of supplies while the output pulse widthmay be controlled by the time conStant - RJ X CJ.a simplified diagram, OJ (Figure 3) provides 0.7Vdead zone so that Q3 is turned ON for a risinginput pulse and Q 2 OFF prior to QJ turning ON afew nanoseconds later. O 2 prevents zenering of theemitter·base junction of Q 2 and provides an initialdischarge path for the load via Q3' During a fallinginput, the stored charge in Q3 is used beneficiallyto keep Q3 ON thus preventing Q 2 from conduct·ing until QJ is OFF. QJ stored charge is quicklydischarged by means of common-base transistorQ4'The complete circuit of the MH0026 (see schematicon page 130 basically makes Darl ingtons outof each of the transistors in Figure 3....---+-ov·,..--..... -ov·EXTERNALClIN~ r-o"-"""'-0 OUTEXTERNALClIN~ r-o01RlOUTt-4~-+-... o v-L-..... -.... -ov-FIGURE 1. Conventional MOS Clock DriveFIGURE 3. Simplified MH0026O 2 provides 0.7V of dead-zone thus preventing QJand Q 2 from conducting at the same time. Inorder to drive large capacitive loads, QJ and Q 2are large geometry devices but COb now limitsuseful output rise time. A high voltage TTL outputstage (Figure 2) could be used; however, duringswitching until the stored charge is removed fromQJ , both output devices conduct at the same time.This is familiar in TTL with supply line glitches inthe order of 60 to 100 mAo A clock driver builtthis way would introduce 1.5 amp spikes into thesupply lines....--..... -ov·When the output of the TTL input element (notshown) goes to the logic "1" state, current issupplied through CIN to the base of QJ and Q 2turning them ON, and Q 3 and Q 4 OF F when theinput voltages reaches 0.7V. Initial discharge ofthe load as well as E-B protection for Q 3 and Q 4are provided by Oland D 2 . When the inputvoltage reaches about 1.5V, Q 6 and Q7 begin toconduct and the load is rapidly discharged by Q7'As the input goes low, the input side of CIN goesnegative with respect to V- causing Q 8 and Q 9 toconduct momentarily to assure rapid turn-off ofQ 2 and Q7 respectively. When Q 1 and Q 2 turnOFF, Darlington connected Q 3 and Q 4 rapidlycharge the load toward V+ volts. R6 assures thatthe output will reach to within one V SE of theV+ supply.EXTERNALClIN~ r-o01OUTThe real secret of the device's performance isproper selection of transistor geometries and resistorvalues so that Q 4 and Q 7 do not conduct atthe same time while minimizing delay from inputto output.L-..... ~-~-t-ov-FIGURE 2. Alternate MOS Clock DriveUnique circuit design and advanced semiconductorprocessing overcome these clasic problems allow·ing the high volume manufacture of a device, theMH0026, that delivers 1.5A peak output currentswith 20ns rise and fall times into 1000pF loads. In3.0 Power Dissipation ConsiderationsThere are four considerations in determiningpower dissipations.1. Average DC power2. Average AC power3. Package and heat sink selection4. Remember-2 drivers per package134
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National Semiconductor CorporationM
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IntroductionHere is National's newe
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RAMsMM1101 256-Bit Fully Decoded St
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MOS Selection GuidePRODUCT TYPE NO.
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The five basic elements are interco
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absolute maximum ratingsVoltage at
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timing diagramsSequence of Command
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programming of MM5704 (can't)o coun
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......tnG)G)(I)0010:E:E......00..:E
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Dynamic Shift Registers~~ MM1402A/M
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performance characteristics! 100,.J
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«o ....oLC'):E:E.......«.... oo-.
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Dynamic Shift Registers.....enoLn:?
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performance characteristicsN~ '"> u
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logic table (Notes 3,4)MOOEREGISTER
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Dynamic Shift RegistersMM4015A/MM50
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performance characteristics~~>...zw
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.... co0LC):E:E........CO....0~:E:E
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Dynamic Shift RegistersMM4017/MM501
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perform ance ch a racteristicslOOkN
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performance characteristics!ji,:Ii'
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absolute maximum ratingsGate Voltag
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performance c ha racte risticsac te
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absolute maximum ratingsDrain Volta
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Static Shift RegistersMM4040/MM5040
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guaranteed performance characterist
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Static Shift RegistersMM4052/MM5052
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guaranteed performance characterist
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MM4203/MM5203 electrically programm
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operating characteristics (con'tl f
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ROMsMM4210/MM5210 1024-bit read onl
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performance characteristicsGuarante
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ROMsMM42111MM52111024-bit read only
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performance characteristicsPower Su
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MM4220/ MM5220 1024-bit read only m
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performance characteristicsGuarante
Page 92 and 93: ROMsMM42211MM52211024-bit read only
Page 94 and 95: performance characteristicsPower Su
Page 96 and 97: illSROMsMM4230/MM5230 2048-bit read
Page 98 and 99: performance characteristicsGuarante
Page 100 and 101: ~12V-----_""' _____________ROMsMM42
Page 104 and 105: ROMsMM4232/MM5232 4096 -bit static
Page 108 and 109: ROMsMM4240/MM5240 2560-bit static c
Page 110 and 111: performance characteristics1200Guar
Page 112 and 113: ROMsMM42411MM5241 3072-bit static r
Page 114 and 115: performance characteristicsTypical
Page 116 and 117: RAMsMM1101/MM11011/MM1101A/MM1101A1
Page 118 and 119: performance curves (MM1101A/MM1101A
Page 120 and 121: RAMsMM1103 1024-bit fully decodeddy
Page 122 and 123: ac operating characteristics (con't
Page 124 and 125: absolute maximum ratingsAll I nput
Page 126 and 127: MH0007/MH0007C dc coupled MOS clock
Page 128 and 129: Clock DriversMH0009/MH0009C dc coup
Page 130 and 131: MH0012/MH0012C high speed MOS clock
Page 132 and 133: MH0013/MH0013C two phase MOS clock
Page 134 and 135: typical performance (cont.)FIGURE 4
Page 136 and 137: MH0025/MH0025C two phase MOS clock
Page 138 and 139: applications informationCircuit Ope
Page 140 and 141: absolute maximum ratings (Notes 1 &
Page 144 and 145: application information (con't)The
Page 146 and 147: application information (con't)For
Page 148: absolute maximum ratingsContinuous
Page 151 and 152: ininin::?i::?iabsolute maximum rati
Page 153 and 154: typical input capacitancesMM450, MM
Page 155 and 156: "litIt)It):?!:?!......."litIt)"lit:
Page 157 and 158: enQ)...Q)fJ)oCD-o:I:«oIJ')-o:I:«o
Page 159 and 160: ...(I)Q)electrical characteristicse
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Page 163 and 164: TtilQ)'a::Q)enoCD....o:I:«oIt)....
Page 165 and 166: absolute maximum ratingsVplus Suppl
Page 167 and 168: No....~
Page 169 and 170: Uanor-.M~
Page 171 and 172: schematic diagramanalog switch data
Page 173 and 174: (.)0')....ooJ:Z........0')....ooJ:Z
Page 175 and 176: (.)0')-ooJ:Z........0')-ooJ:Z(.)"d'
Page 177 and 178: absolute maximum ratingsSupply Volt
Page 179 and 180: MM482/MM582Voltage Transfer Charact
Page 182 and 183: ROM Character GeneratorsMM4220N P/M
Page 184 and 185: ROM Character GeneratorsMM4240ABU/M
Page 186 and 187: ROM Character GeneratorsMM4240ABZ/M
Page 188 and 189: ROM Code Convertersrn"owSK0003 sine
Page 190 and 191: ROM Code Converte rsMM4220AE/MM5220
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ROM Code ConvertersMM4220AP/MM5220A
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ROM Code ConvertersMM4220BL/MM5220B
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ROM Code ConvertersMM4220BM/MM5220B
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ROM Code ConvertersMM4220BN/MM5220B
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MM4220DF/MM5220DF"quick brown fox"
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ROM Code ConvertersMM4220EK/MM5220E
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MM4220LR/MM5220LR BCOIC to ASCII-7/
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ROM Code ConvertersMM4221RO/MM5221R
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ROM Code ConvertersMM4221RR/MM5221R
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11151 ROM Code ConvertersM M 42 30
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code conversion table-selectric-to-
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ROM Code ConvertersMM4230JT /MM5230
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ROM Code ConvertersMM4230KP/MM5230K
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~BlillSROM Code ConvertersMM42300W/
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ROM Code ConvertersMM4230QY/MM5230Q
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ROM Code ConvertersMM4230RS/MM5230R
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A.a:-MNit)~~.......A.a:ROM Code Con
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«coco~r-..:?!c........«coco~Ln:?!
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«0000~.....~c.......«0000~Ln~Ctru
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ROM Code ConvertersDM7598AA/DM8598A
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Custom MOS/LSIo...ct/)o3s:o(J).....
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All designs are verified with a cir
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...(1)Q)....(1).-0>Q)a:........s::.
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..... oCO..Q)..Q)...CJco ..U)cQ)oco
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(I)..... oasQ)..Q)...Co).. asas..cQ
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BriefsJANUARY 1970...aTRIG FUNCTION
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MASK PROGRAMMING SPECIALIZESMOS SHI
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ORDERING INFORMATIONWhen ordering,
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Clock Repetition Rate: The range of
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National Semiconductor Corporation2
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