Dynamic Shift Registers - Bitsavers - Trailing-Edge

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typical applicationsTTL/DTL Logic Compatible -SEE ELECTRICALSPECIFICATIONSBit Serial Data OutputBUSY 1 I__ (NOTEIBUSY! )IDLE KEY RESETKEYBOARD INTERFACESUBSYSTEM (KIIMM5704~ CR NOTElVss OR OPEN CASE SHIFTVGG --0 ""C)-__(;;;,CS;';')_-i~ALARM OUTTTL COMPATIBLECYCLEMARKER(CM)Vss (+5V)TTL COMPATIBLENote 1: With single keyboard interface application, if busy lines are not used in system, leave open. Ifsystem will use busy signal, it will require MOS to TTL interface. In multiple (KI) subsystem.pplicmons. busy lines are connected busy 1 to busy 1 and busy 2 to busy 2.Note 2: D,ta on data bus is in HZ format Data should be strobed attPOUT.Note 3: CR value dependent on keybolrd scan frequency.TTL/DTL Compatible - Output Bit ParallelBUSY 1 1__ (NOTEIBUSY Z )SEE ELECTRICALSPECIFICATIONSIDLE KEY RESETKEYBOARD INTERFACESUBSYSTEM (KIIMM5704~ CR NOTElVss OR OPEN CASE SHIFT(CS)VGG --0 ""C~-"";''''';''-'''''~VssALARM OUTVGG (-lZV)TTL COMPATIBLECYCLEMARKER(CM)16K.'NDATA STROBEV3 (OPEN)V,(VGG)r-~-t!--VssliZ DMBBOOV3 (OPEN)V, (VGG)SERIAL OUTPUT(COMMANO SIGNALS)Note 1: With single keyboard interface application, if busy lines are not used in system, leave open. Ifsystem will use busy signal, it will require MOS to TTl interface. In multiple (KI) subsystemapplications, busy lines are connected busy 1 to busy 1 end busy2 to busy 2.Note 2: Data on data bus is in AZ format. Data should be strobed at !POUT.Note 3: CR value dependent on keyboard scan frequency.5
timing diagramsSequence of Command and Data TransferNOTElIITT1MES - 0 1 Z 3 4 5 I 1 I • 10 11 12 13 14 15 16 11 11 I' 20 21 Z2 nCYCL~~RkER:lL ____ r~ ________________________ J~XMIT KEY :-.-nL-______ =:-:-__________________ _STATICXMIT ________...... n-rT1 NoTE3ALARM SET ______________....... nALARM REUT _______________..... nCHARACTER _________________ ..JnL-________________kEY::::: ___________________ ..... n...._____________________..-:-___________________....::;:::;::;:::;:::;:::;::;::;::::;-___ALARMrCHARAg!;: ___________________----! : : : : : : : : Ll--""","---I I~OVNAMIC(91____lNot. 1: Cycle Mtd., annol_, SODIIIf dian n lit r ......Iottl: litTilnemlif,f -bwtlzV.-IYlllinilnwm:+LIVtI .. V._Hott3: Slite Xmil$itllll i, _lit TifIIII- I'roI!lIIJIJIIId fol Iii TlmIS in MMI' .... AA.code patternKeyboard Interface ASCII Code ProgramCase <strong>Shift</strong>Upper C,.. Logic Counter DrivingControl ICS)No X NCModuloLevel + - ProgramFunctionDevice I 1 III 20 o Counter 4 CMStatic Key Fonn No X NC No. 3 0 4 0 E Counter 6TimingUnitsKey ScanKeyPin No. 2(+) (Alpha)ldon· line Iden·tity T R 8 7 6 5 4 3 2 1 0 tityQ T1 RO 1 1 1 0 1 0 0 0W T1 Rl 1 1 1 0 1 0 1 1E T1 R2 1 1 1 0 0 0 1 0R T1 R3 1 1 1 0 1 0 0 1T T1 R4 1 1 1 0 1 0 1 0y Tl R5 1 0 1 0 1 1 0 0U Tl R6 1 0 1 0 1 0 1 0(511 T1 R7 1 1 1 0 0 1 0 0A T2 RO 1 0 1 0 0 0 0 0S T2 Rl 1 0 1 0 1 0 0 10 T2 R2 1 0 1 0 0 0 1 0F T2 R3 1 1 1 0 0 0 1 1G T2 R4 1 0 1 0 0 0 1 1H T2 R5 1 0 1 0 0 1 0 0J T2 R6 1 1 1 0 0 I 0 1K T2 R7 1 0 1 0 0 I 0 IZ T3 RO 1 0 I 0 I I 0 IX T3 Rl 1 1 I 0 1 1 0 0C T3 R2 I I I 0 0 0 0 1V T3 R3 I 0 1 0 1 0 1 IB T3 R4 I 0 I 0 0 0 0 1N T3 R5 1 0 1 0 0 1 1 IM T3 R6 I 0 I 0 0 I I 0L T3 R7 I I I 0 0 I I 00 T4 RO I I I 0 0 I I 1P T4 RI I 0 I 0 1 0 0 0[ T4 R2 I I I 0 I 1 0 1\ T4 R3 1 0 1 0 I 1 I 0I T4 R4 I I 1 0 I I I 0(5)("> T4 R5 1 I 1 0 I I I I@ T4 R6 1 1 1 0 0 0 0 0(5)- T4 R7 1 0 1 0 1 I 1 11 11 71 %0 20 41 91 51 )1 !1 30 $0 &10 (.0 .1 +00 81 #0 60 "01 -01 I0 01 ;0 0 SPI ?8 71 11 11 11 11 11 01 01 11 01 01 01 11 01 0I 11 01 0I 1I II 0I 0I 0I 01 II 1I 01 11 01 11 II II 0Pin No. 2(-) (Numeric)6 5 4 3 20 1 1 0 00 1 1 0 10 1 0 0 10 1 1 0 00 1 1 0 10 1 1 1 00 1 1 0 10 1 0 1 00 1 0 0 00 1 1 0 00 1 0 0 10 1 0 0 10 1 0 0 10 1 0 1 00 I 0 1 00 I 0 I 00 1 I 1 00 I I 1 00 1 0 0 00 1 I 0 10 1 0 0 00 I 0 1 10 I 0 1 I0 I 0 I I0 I 0 1 10 I 1 0 00 I 1 I 00 1 1 I I0 1 1 I I0 I 1 I I0 1 0 0 00 I I I 11 00 11 10 11 00 00 10 10 10 11 10 01 01 10 01 0I II 00 01 II 01 01 00 10 0I 10 0I 10 00 1I 00 01 1Note 1: A logic "1" or "X" "" "most negative voltilge".Note 2: A logic "0" "" "mos~ positive voltage".Not83: All "Don't Care" cases must be defined as a "1" or "0",Note 4: If less than 9 bits are used unused bits will be programmed logic "1".Note 5: These locations are programmed for clearing the keyboard alarm.Note &: Bit eight (column 7) is odd parity bit for ASCII code shown.6
Page 1 and 2: National Semiconductor CorporationM
Page 4: IntroductionHere is National's newe
Page 7 and 8: RAMsMM1101 256-Bit Fully Decoded St
Page 9 and 10: MOS Selection GuidePRODUCT TYPE NO.
Page 11 and 12: The five basic elements are interco
Page 13: absolute maximum ratingsVoltage at
Page 17 and 18: programming of MM5704 (can't)o coun
Page 19 and 20: ......tnG)G)(I)0010:E:E......00..:E
Page 21 and 22: Dynamic Shift Registers~~ MM1402A/M
Page 23 and 24: performance characteristics! 100,.J
Page 25 and 26: «o ....oLC'):E:E.......«.... oo-.
Page 27 and 28: Dynamic Shift Registers.....enoLn:?
Page 29 and 30: performance characteristicsN~ '"> u
Page 31 and 32: absolute maximum ratingsVoltage at
Page 33 and 34: logic table (Notes 3,4)MOOEREGISTER
Page 37 and 38: Dynamic Shift RegistersMM4015A/MM50
Page 39 and 40: performance characteristics~~>...zw
Page 41 and 42: .... co0LC):E:E........CO....0~:E:E
Page 43 and 44: Dynamic Shift RegistersMM4017/MM501
Page 45 and 46: perform ance ch a racteristicslOOkN
Page 51 and 52: performance characteristics!ji,:Ii'
Page 53 and 54: absolute maximum ratingsGate Voltag
Page 59 and 60: performance c ha racte risticsac te
Page 61 and 62: absolute maximum ratingsDrain Volta
Page 63 and 64: Static Shift RegistersMM4040/MM5040
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guaranteed performance characterist
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absolute maximum ratingsVoltage at
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Static Shift RegistersMM4052/MM5052
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guaranteed performance characterist
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absolute maximum ratingsVoltage at
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MM4203/MM5203 electrically programm
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operating characteristics (con'tl f
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ROMsMM4210/MM5210 1024-bit read onl
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performance characteristicsGuarante
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ROMsMM42111MM52111024-bit read only
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performance characteristicsPower Su
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MM4220/ MM5220 1024-bit read only m
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ROMsMM42211MM52211024-bit read only
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performance characteristicsPower Su
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illSROMsMM4230/MM5230 2048-bit read
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~12V-----_""' _____________ROMsMM42
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ROMsMM4232/MM5232 4096 -bit static
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ROMsMM4240/MM5240 2560-bit static c
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performance characteristics1200Guar
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ROMsMM42411MM5241 3072-bit static r
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performance characteristicsTypical
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RAMsMM1101/MM11011/MM1101A/MM1101A1
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performance curves (MM1101A/MM1101A
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RAMsMM1103 1024-bit fully decodeddy
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ac operating characteristics (con't
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absolute maximum ratingsAll I nput
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MH0007/MH0007C dc coupled MOS clock
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Clock DriversMH0009/MH0009C dc coup
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MH0012/MH0012C high speed MOS clock
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MH0013/MH0013C two phase MOS clock
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typical performance (cont.)FIGURE 4
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MH0025/MH0025C two phase MOS clock
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applications informationCircuit Ope
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absolute maximum ratings (Notes 1 &
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typical applicationsIfOP~T"IfOPUT"D
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application information (con't)The
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application information (con't)For
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absolute maximum ratingsContinuous
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ininin::?i::?iabsolute maximum rati
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typical input capacitancesMM450, MM
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"litIt)It):?!:?!......."litIt)"lit:
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absolute maximum ratingsVplus Suppl
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No....~
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schematic diagramanalog switch data
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(.)0')....ooJ:Z........0')....ooJ:Z
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(.)0')-ooJ:Z........0')-ooJ:Z(.)"d'
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absolute maximum ratingsSupply Volt
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MM482/MM582Voltage Transfer Charact
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ROM Character GeneratorsMM4220N P/M
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ROM Character GeneratorsMM4240ABU/M
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ROM Character GeneratorsMM4240ABZ/M
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ROM Code Convertersrn"owSK0003 sine
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ROM Code Converte rsMM4220AE/MM5220
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ROM Code ConvertersMM4220AP/MM5220A
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ROM Code ConvertersMM4220BL/MM5220B
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ROM Code ConvertersMM4220BM/MM5220B
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ROM Code ConvertersMM4220BN/MM5220B
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MM4220DF/MM5220DF"quick brown fox"
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ROM Code ConvertersMM4220EK/MM5220E
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MM4220LR/MM5220LR BCOIC to ASCII-7/
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ROM Code ConvertersMM4221RO/MM5221R
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ROM Code ConvertersMM4221RR/MM5221R
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11151 ROM Code ConvertersM M 42 30
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code conversion table-selectric-to-
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ROM Code ConvertersMM4230JT /MM5230
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ROM Code ConvertersMM4230KP/MM5230K
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~BlillSROM Code ConvertersMM42300W/
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ROM Code ConvertersMM4230QY/MM5230Q
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ROM Code ConvertersMM4230RS/MM5230R
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A.a:-MNit)~~.......A.a:ROM Code Con
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«coco~r-..:?!c........«coco~Ln:?!
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«0000~.....~c.......«0000~Ln~Ctru
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ROM Code ConvertersDM7598AA/DM8598A
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Custom MOS/LSIo...ct/)o3s:o(J).....
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All designs are verified with a cir
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BriefsJANUARY 1970...aTRIG FUNCTION
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MASK PROGRAMMING SPECIALIZESMOS SHI
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ORDERING INFORMATIONWhen ordering,
Page 288 and 289:
Clock Repetition Rate: The range of
Page 290:
National Semiconductor Corporation2
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