Dynamic Shift Registers - Bitsavers - Trailing-Edge

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absolute maximum ratingsAll I nput or Output Voltages withRespect to Most Positive Supply Voltage VssPower DissipationOperating Temperature RangeStorage Temperature RangeLead Temperature (Soldering, 10 sec)+0.3V to -20V600mW-25°C to +70°C-65°C to +150°C300°Cdc operating characteristicsT A within operating temperature range, Vss = +5V ±5%, V DO = -12V ±5%, unless otherwise noted.PARAMETERCONDITIONSMIN TVP MAXUNITSInput Voltage (Address input,chip enable and data input)Logic "0" (VIH )Logic "1" (V IL )Vss - 2.0Vss - 4.0VVI nput voltage (Precharge andReadlWrite)Logic "0" (V IH )Logic "1" (VIL )V ss -l.5Vss - 15VVOutput VoltageData OutputLogic "0" (V OH)Logic "1" NodI L = 200 fJA SourceIL = 1.6 mA Sink2.40.4VVAverage Supply Current (lDD)t cycle = 450 ns and tpc = 300 ns20mAac operating cha racteristicsT A within operating temperature range, Vss = +5V ±5V%, V DO = -12V ±5%, unless otherwise noted.Read Cycle (T ReiWrite Cycle (T weiRead/Write Cycle (T RWe!Access Time (T A)Address to Chip Enable (T Ae! Note 2Address to Precharge Delay (T APL) Note 2Address to Write Pulse Delay (T AWD)Write Pulse Width (T wp)Precharge Off Time (T pp)Read Write to Precharge Delay (T WRP)Refresh Interval (T REF)Address to Precharge <strong>Trailing</strong> <strong>Edge</strong> (T APT)450600I I(600 + T D See Note 1)350oo3502501505035050502nsnsnsnsnsnsnsnsnsnsmsnsca pacitance cha racteristicsAddress Capacitance (CA )Chip Enable Capacitance (CCE )Precharge Capacitance (Cpe!ReadlWrite Capacitance (CRW )Data Input/Output Capacitance (CIN/OUT)IN - SS f = 1 MHzV VIN = -V Vss 1All unusedVIN =Vss .Inputs areVIN = Vssat AC GroundVIN = Vss5525107pFpFpFpFpFNote 1: TD = Output data to input data delay in read-modify-write cycle.Note 2: Characteristic max limits to achieve T A specifications. An increase in these times will cause T Ato increase directly.115
switching time waveformsREAD CYCLEt-------'"'----~.,I------,~,-----II------,,--~--WRITE CYCLEt--------~,~---------I------,~,-1-------,,------1'M----~~--------------------,1------ T~,,----_iDAT.: __ -'--! ___________________ ....NDII: ............................. ....connection diagramDual-In-Line Package.. ' ".,.. " ..REAOI 3" ..WRITE. 13 CKPA,ENAILE.,..12 OATAI.'OUT11 !'RECHARIiE.. ".. • VaV~TOPVIfW116
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National Semiconductor CorporationM
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IntroductionHere is National's newe
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RAMsMM1101 256-Bit Fully Decoded St
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MOS Selection GuidePRODUCT TYPE NO.
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The five basic elements are interco
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absolute maximum ratingsVoltage at
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timing diagramsSequence of Command
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programming of MM5704 (can't)o coun
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Dynamic Shift Registers~~ MM1402A/M
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performance characteristics! 100,.J
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Dynamic Shift Registers.....enoLn:?
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performance characteristicsN~ '"> u
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logic table (Notes 3,4)MOOEREGISTER
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Dynamic Shift RegistersMM4015A/MM50
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performance characteristics~~>...zw
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.... co0LC):E:E........CO....0~:E:E
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Dynamic Shift RegistersMM4017/MM501
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perform ance ch a racteristicslOOkN
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performance characteristics!ji,:Ii'
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absolute maximum ratingsGate Voltag
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performance c ha racte risticsac te
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absolute maximum ratingsDrain Volta
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Static Shift RegistersMM4040/MM5040
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guaranteed performance characterist
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Static Shift RegistersMM4052/MM5052
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guaranteed performance characterist
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Page 76 and 77: MM4203/MM5203 electrically programm
Page 78 and 79: operating characteristics (con'tl f
Page 80 and 81: ROMsMM4210/MM5210 1024-bit read onl
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Page 84 and 85: ROMsMM42111MM52111024-bit read only
Page 86 and 87: performance characteristicsPower Su
Page 88 and 89: MM4220/ MM5220 1024-bit read only m
Page 92 and 93: ROMsMM42211MM52211024-bit read only
Page 94 and 95: performance characteristicsPower Su
Page 96 and 97: illSROMsMM4230/MM5230 2048-bit read
Page 100 and 101: ~12V-----_""' _____________ROMsMM42
Page 104 and 105: ROMsMM4232/MM5232 4096 -bit static
Page 108 and 109: ROMsMM4240/MM5240 2560-bit static c
Page 110 and 111: performance characteristics1200Guar
Page 112 and 113: ROMsMM42411MM5241 3072-bit static r
Page 114 and 115: performance characteristicsTypical
Page 116 and 117: RAMsMM1101/MM11011/MM1101A/MM1101A1
Page 118 and 119: performance curves (MM1101A/MM1101A
Page 120 and 121: RAMsMM1103 1024-bit fully decodeddy
Page 122 and 123: ac operating characteristics (con't
Page 126 and 127: MH0007/MH0007C dc coupled MOS clock
Page 128 and 129: Clock DriversMH0009/MH0009C dc coup
Page 130 and 131: MH0012/MH0012C high speed MOS clock
Page 132 and 133: MH0013/MH0013C two phase MOS clock
Page 134 and 135: typical performance (cont.)FIGURE 4
Page 136 and 137: MH0025/MH0025C two phase MOS clock
Page 138 and 139: applications informationCircuit Ope
Page 140 and 141: absolute maximum ratings (Notes 1 &
Page 142 and 143: typical applicationsIfOP~T"IfOPUT"D
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absolute maximum ratingsSupply Volt
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MM482/MM582Voltage Transfer Charact
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ROM Character GeneratorsMM4220N P/M
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ROM Character GeneratorsMM4240ABU/M
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ROM Character GeneratorsMM4240ABZ/M
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ROM Code Convertersrn"owSK0003 sine
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ROM Code Converte rsMM4220AE/MM5220
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ROM Code ConvertersMM4220AP/MM5220A
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ROM Code ConvertersMM4220BL/MM5220B
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ROM Code ConvertersMM4220BM/MM5220B
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ROM Code ConvertersMM4220BN/MM5220B
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MM4220DF/MM5220DF"quick brown fox"
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ROM Code ConvertersMM4220EK/MM5220E
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MM4220LR/MM5220LR BCOIC to ASCII-7/
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ROM Code ConvertersMM4221RO/MM5221R
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ROM Code ConvertersMM4221RR/MM5221R
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11151 ROM Code ConvertersM M 42 30
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code conversion table-selectric-to-
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ROM Code ConvertersMM4230JT /MM5230
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ROM Code ConvertersMM4230KP/MM5230K
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~BlillSROM Code ConvertersMM42300W/
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ROM Code ConvertersMM4230QY/MM5230Q
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ROM Code ConvertersMM4230RS/MM5230R
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A.a:-MNit)~~.......A.a:ROM Code Con
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ROM Code ConvertersDM7598AA/DM8598A
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Custom MOS/LSIo...ct/)o3s:o(J).....
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All designs are verified with a cir
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BriefsJANUARY 1970...aTRIG FUNCTION
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MASK PROGRAMMING SPECIALIZESMOS SHI
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ORDERING INFORMATIONWhen ordering,
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Clock Repetition Rate: The range of
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National Semiconductor Corporation2
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Dynamic Shift Registers - Bitsavers - Trailing-Edge

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