Dynamic Shift Registers - Bitsavers - Trailing-Edge

RAMsMM1101/MM11011/MM1101A/MM1101A1/MM1101A2256-bit fully decoded static random access memorygeneral descriptionThe MMll0l family of fully decoded 256 word xl-bit random access memories are monolithic MaSintegrated circuits using silicon gate low thresholdtechnology to achieve bipolar compatibility_ Theyare static, require no clocks, and hold informationindefinitely, subject to the integrity of the powersupply to the RAM plane_features• Fastaccesstimes MMll01A2 500 ns maxMM11011, MMll01AlMMll0l, MMll01A1.0 tis max1.5 tis max• Improved speed/power productMMll01A21/30f1101A• Low power operation 1.5 mW/bit• Fewer system components bipolar compatibleinput and output• Second source flexibility 1101,1101A,• TRI-STATETM output11011, 1101A 1 secondsources availablewired ORcapability• Specified ambient temperature _25°e to + 70 0 eapplications• High speed buffer memories• L?cal memory storeblock and connection diagramsAo10A, X INPUTA,9 BUFFERSA,11256 BITRAMPLANEDATA 13OUTDATA 14OUTcsR/WDATA IN161512Vo == Power to buffers, decoders, and sense circuitVDO "RAM plane power only. See Note 5.Dual-In-Line PackageINPUT AsINPUT A7INPUT A6VoINPUT A4INPUT AoVoo16 CHIP SELECT15READ/WRlTE14 DATA OUT13 DATA OUT12 DATA IN11INPUT A310INPUT At9 INPUT A2TOP VIEW107