Dynamic Shift Registers - Bitsavers - Trailing-Edge

The five basic elements are interconnected by aserial bit bus-organized distribution system withthree data buses, and three command buses (seeblock diagram Figure 2). The basic cycle of thesystem is 76 bits, controlled by a set of 32 datamicro-instructions stored in the arithmetic andregister unit.packages for easy handling and test. Compatibilitywith the keyboard, data codes, timing and programsrequired for the system application is obtainedduring wafer fabrication by mask programming.A preprogrammed calculator kit with 14-'digit display outputs is available for evaluationand general use.MICRO INSTRUCTIONBUSYALARM'-++-___ +; ____ H-__ -+-_-i-I---II/OBUSI'--____________ -+-___ --1 1/0 BUS II(4)(5(DISPLAY'--__ ---'I DATA TRANSFER LINE• SIGNAL OR CONTROL DATA LINEFIGURE 2. MAPS Block DiagramData between these elements is passed serial overthe three data buses. The logic sequence of datahandling is programmed in the CRaM element,each CRaM provides the system 256 words of a10-bit command. The T&C element interpolateseach command and generates proper time synchronizationand time enable signals for performing thecommand, thus allowing the data in the AU andRU elements to be acted upon. To perform dataresult tests and control operations, 32 commandmicroinstructions are stored in the T&C element.The format and function performed by each commandinstruction is programmable by storing theproper bit pattern for the op-code in CRaM storage.This allows the same basic command instructionto be programmed differently for a widevariety of mach ine applications. The keyboardencoder will accept up to 32 dynamic keys and 8static switch inputs and the static data monitorwill scan two banks of 8 data points.The specific system configuration is expandablesince additional RU, CRaM, KI and SDM elementscan be added on the data and command bus system.The system will accommodate up to 32CRaMs or a total of 8192 microprogrammed instructions.Access from microprogrammed instructionsin RAM and mass storage can be performedand controlled. This allows the MAPS elements tofunction as mini-processors within a larger system.The system is dynamic two phase logic fabricatedwith National's bipolar compatible, P-channel enhancementmode, low threshold technology. Allelements are in small 16 and 24 pin dual-in-linefeatures• Bus-organized for easy expansion and interfacewith external systems• Keyboard input• Static data monitor binary or BCD input• Error-free keyboard decoding (see MM5704AAdata sheet)• Data and display control outputs• Clock rates to 750 kHz two phase logic• DTl/TTl compatible on output for display• Standard +5V and -12V supplies• Standard 16-pin and 24-pin DIPsapplications• General purpose serial computers• "Smart" data terminals• Numerical controls• Electronic business machines• Point of sales equipment• Electronic scales• Electronic calculators• Traffic controls• Medical electronics (analyzers, patient monitoring,etc.)2