Dynamic Shift Registers - Bitsavers - Trailing-Edge

absolute maximum ratingsVGG Supply VoltageV LL Supply VoltageInput VoltageStorage Temperature RangeOperating Temperature Range MM4232MMS232Lead Temperature (Soldering. 10 sec)Vss - 20VVss - 20V(Vss - 20) v < V IN < (V SS + .03)V-6SoC to +1S0°C-SSoC to +12SoC- 2SoC to +70°C300°Celectrical characteristicsTA within operating temperature range, Vss = +5V ±5%, VGG = Voo = -12V ±5%, unless otherwise noted.PARAMETER CONDITIONS MINOutput Voltage LevelsLogical LOWIL = 1.6 mA SinkLogical HIGH IL = 100 IlA Source 2.4Input Voltage LevelsLogical LOWLogical HIGH Vss - 2.0Power Supply CurrentIss (Note 4) Vss = 5, VGG = -12, V LL = -12, TA = 25°CIss (Note 4) Vss = 5, VGG= -12, VLL = -3, TA = 125°CI nput LeakageInput Capacitance (Note 2)Output Capacitance (Note 2)Y'N = Vss - 10Vf = 1.0 MHz, Y'N = OVf = 1.0 MHz, Y'N = OVAddress Time (Note 1) T A = 25°C, Vss = 5 150T ACCESS VGG = V LL = -12VOutput AN 0 Connections (Note 3)TVP231254MAXVss -4.0UNITS.4 VVVV37 mA20 mA1 IJA10 pF10 pF1000 ns20Note 1: Capacitances are measured periodically only.Note 2: Address is measured from the change of data on any input or chip enable line to the outputof a TTL gate. (See Timing Diagram.)Note 3: The address time follows the following equation: T ACCESS = The specified limit + (N-l1 x25 ns where N = Number of AND connections.Note 4: Outputs open.96