11.07.2015 Views

Dynamic Shift Registers - Bitsavers - Trailing-Edge

Dynamic Shift Registers - Bitsavers - Trailing-Edge

Dynamic Shift Registers - Bitsavers - Trailing-Edge

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~12V-----_""' _____________ROMsMM42311MM5231 2048-bit read only memorygeneral descriptionThe MM4231/MM5231 is a 2048-bit static readonly memory. It is a P-channel enhancement modemonolithic MOS integrated circuit utilizing lowthreshold voltage technology. The device is a nonvolatilememory organized as a 256-8 bit words or512-4 bit words. Programming of the memorycontents is accomplished by changing one maskduring the device fabrication.features• Bipolar compatibility• High speed operation+5V, -12V operation640 ns typo• Static operation No clocks required• Common data busing Output wire ANDcapability• Chip enable output controlapplications• Code conversion• Random logic synthesis• Table look-up• Character generator• Micro-programmingblock and connection diagramsDual-In-Line PackageINPUTSr___ 1-___ ~S(NSEAMPUFIEIIS OUTPun tIliPUTA3 24v",INPUtA2A,INPUT A,A,I,OUTPUTS,IN'UTA.OUTPUT 82INPUT AsMEMOIIYADOIIESSDECODEII~~OUll'UTB3OUTPUT I."INPUT~INPUT A,A,B,OU1'U185OUTPUT 8.INPUTA.v"I...DUTPUTB,OUT,UT8.v .."MODECONTROLCHIPENABLEINPUT A,MOOECONYIIOL-----L,,)tTbtolitputsll'llcon_ttdtoVDDth'G~gh.niate".lMOSl'llsi"orwIIenOiubled.*T•• outpv.ti$EnlbledbYlpplyingaLo~"I"toth.C.ipEn.b"lin •.typical application256 x 8 Bit ROM Showing TTL Interface-ITTL GATES1tseeap.rlt,ngllllHlanotti..""'''''--,A,t CHIPENABLE ..t MOOECONTIIOl..v".. I,..A,B,AoA,1"""..B,MM42311MM5231v" ,. A,,I,A,A,1].-Operating Modes256x8 ROM connection (shown)Mode Control - Logic "0"Ag - Logic ","512x4 ROM connectionMode Control - Logic ","Ag - logic "0" Enables the odd(8 1,83 , .. 89 ) outputs- Logic "," Enables the even(B 2, 84 ... Ba) outputs.The outputs are "Enabled" when a logic" 1" isapplied to the Chip Enable line .Logic levels are negative true MOS logic.Mode Control should be "hard wired" to Voe(Logical "1") or Vss (Logical "0").91

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