w65c816s Microprocessor Data Sheet.pdf

The Western Design Center, Inc.20. Relative rBCC, BCS, BEQ, BMI, BNE, BPL, BRA,BVC,BVS9 OpCodes, 2 bytes, 2,3 and 4 cycles21. Relative Long rlBRL1 OpCode, 3 bytes, 4 cycles22a. Stack sABORT, IRQ, NMI, RES4 hardware interrupts0 bytes, 7 and 8 cyclesTable 6-7 (continued)Address Mode Note Cycle VPB MLB VDA(14)1 1 1 12 1 1 0(5) 2a 1 1 0(6) 2b 1 1 01 1 1 122b. Stack sPLA, PLB, PLD, PLP, PLX, PLYDifferent than N65026 Op Codes,1 byte, 4 and 5 cycles22c. Stack sPHA, PHB PHP, PHD, PHK, PHX, PHY7 Op Codes, 1 byte, 3 and 4 cycles22d. Stack sPEA1 Op Code, 3 bytes, 5 cycles(3)(7)(10)(10)(10)(11)(1)(1)(12)22e. Stack sPEI1 Op Code, 2 bytes, 6 and 7 cycles (2)22f. Stack sPER1 Op Code, 3 bytes, 6 cycles(see Table 6-8 for abbreviations)1234112345678112344a123a312345122a3456123456111111111110011111111111111111111111111111111111111111111111111111111111111111111110001101111111100111011100111001111100011VPA(14)1100111101100000001100001000111001100000111000W65C816S Data SheetAddress Bus (15) Data Bus RWBPBR,PCPBR,PC+1PBR,PC+1PBR,PC+1PBR,PC+OffsetPBR,PCPBR,PC+1PBR,PC+2PBR,PC+2PBR,PC+OffsetPBR,PCPBR,PC0,S0,S-10,S-20.S-30,VA0,VA+10,AAVPBR,PCPBR,PC+1PBR,PC+10,S+10,S+2PBR,PCPBR,PC+10,S0,S-1PBR,PCPBR,PC+1PBR,PC+20,S0,S-1PBR,PCPBR,PC+1PBR,PC+10,D+DO0,D+DO+10,S0,S-1PBR,PCPBR,PC+1PBR,PC+2PBR,PC+20,S0,S-1OpCodeOffsetIOIOOpCodeOpCodeOffset LowOffset HighIOOpCodeIOIOPBRPCHPCLPAAVLAAVHNext OpCodeOpCodeIOIOREG LowREG HighOpCodeIOREG HighREG LowOpCodeAALAAHAAHAALOpCodeDOIOAALAAHAAHAALOpCodeOffset LowOffset HighIOPCH+Offset+CarryPCL+Offset1111111111110000111111111111111001111100111100The Western Design Center W65C816S 47