w65c816s Microprocessor Data Sheet.pdf

iThe Western Design Center, Inc.W65C816S Data SheetMnemonicOperation+ Add- Subtract^ ANDv ORv Exclusive ORTable 6-5 (continued)aAa,xa,yalal,x(a)(a,x)dd,sd,xd,y(d)[d](d,s),y(d,x)(d),y[d],yrrlsxyc#Processor Status Code7 6 5 4 3 2 1 01 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 N V 1 B D I Z CCPX X-M EC E4 E0 N . . . . . Z CCPY Y-M CC C4 C0 N . . . . . Z CDEC Decrement CE 3A DE C6 D6 N . . . . . Z .DEX X-1 → A CA N . . . . . Z .DEY Y-1 → Y 88 N . . . . . Z .EOR A v M → A4D 5D 59 4F 5F 5D 45 43 55 52 47 53 41 51 57 49 N . . . . . Z .INC Increments EE 1A FE E6 F6 N . . . . . Z .INX X+1 → X E8 N . . . . . Z .INY Y+1 → Y C8 N . . . . . Z .JML*Jump Long to newlocationDC . . . . . . . .JMP Jump to new location 4C 5C 6C 7C . . . . . . . .JSL Jump long to Subroutine 22 . . . . . . . .JSR Jump to Subroutine 20 FC . . . . . . . .LDA M → A AD BD B9 AF BF A5 A3 B5 B2 A7 B3 A1 B1 B7 A9 N . . . . . Z .LDX M → X AE BE A6 B6 A2 N . . . . . Z .LDY M → Y AC BC A4 B4 A0 N . . . . . Z .LSR 0 → 15/7 6 5 4 3 2 1 0 → C 4E 4A 5E 46 56 0 . . . . . Z CMVN* M→M NEGATIVE 54 . . . . . . . .MVP* M→M POSITIVE 44 . . . . . . . .NOP No Operation EA . . . . . . . .ORA A V M → A 0D 1D 19 0F 1F 05 03 15 12 07 13 01 11 17 09 N . . . . . Z .The Western Design Center W65C816S 37