w65c816s Microprocessor Data Sheet.pdf

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The Western Design Center, Inc.W65C816S Data SheetAbsolute Indirect-(a)With Absolute Indirect ((a)) addressing the second and third bytes of the instruction form an address to a pointer inBank 0. The Program Counter is loaded with the first and second bytes at this pointer. With the Jump Long(JML) instruction, the Program Bank Register is loaded with the third byte of the pointer.Instruction: OpCode addrl addrhIndirect 00 addrh addrlAbsolute Long Indexed With X-al,xWith Absolute Long Indexed with X (al,x) addressing the second, third and fourth bytes of the instruction form a24-bit base address. The effective address is the sum of this 24-bit address and the X Index Register.Absolute Long-alInstruction: OpCode addrl addrh baddrOperand Address:baddr addrh addrl+ X Regeffective addressWith Absolute Long (al) addressing the second, third and fourth byte of the instruction form the 24-bit effectiveaddress.Accumulator-AInstruction: OpCode addrl addrh baddrOperand Address: baddr addrh addrlWith Accumulator (A) addressing the operand is the Accumulator.Block Move-xycBlock Move (xyc) addressing is used by the Block Move instructions. The second byte of the instruction containsthe high-order 8 bits of the destination address and the Y Index Register contains the low-order 16 bits of thedestination address. The third byte of the instruction contains the high-order 8 bits of the source address and the XIndex Register contains the low-order bits of the source address. The C Accumulator contains one less than thenumber of bytes to move. The second byte of the block move instructions is also loaded into the Data BankRegister.Instruction: OpCode dstbnk srcbnkdstbnk Y DBRSource Address: srcbnk X RegDest. Address; DBR Y RegIncrement X and Y (MVN) or decrement X and Y (MVP) and decrement C (if greater than zero), then PC=PC+3.The Western Design Center W65C816S 22
The Western Design Center, Inc.W65C816S Data SheetDirect Indexed Indirect-(d,x)Direct Indexed Indirect ((d,x)) addressing is often referred to as Indirect X addressing. The second byte of theinstruction is added to the sum of the Direct Register and the X Index Register. The result points to the Xlow-order 16 bits of the effective address. The Data Bank Register contains the high-order 8 bits of the effectiveaddress.Instruction: OpCode offsetthen: + DBRDirect Register+ offsetdirect address+ X Reg00 (address)Operand Address:effective addressDirect Indexed with X-d,xWith Direct Indexed with X (d,x) addressing the second byte of the instruction is added to the sum of the DirectRegister and the X Index Register to form the 16-bit effective address. The operand is always in Bank 0.Instruction: OpCode offsetDirect Register+ offsetdirect address+ X RegOperand Address: 00 effective addressDirect Indexed with Y-d,yWith Direct Indexed with Y (d,y) addressing the second byte of the instruction is added to the sum of the DirectRegister and the Y Index Register to form the 16-bit effective address. The operand is always in Bank 0.Instruction: OpCode offsetDirect Register+ offsetdirect address+ Y RegOperand Address: 00 effective addressThe Western Design Center W65C816S 23
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