Technology of Q 2500 colour TV set

Technology of Q 2500 colour TV set4.5.3 Movement detectorIn the Y branch there is a movement detector.Here current and previous half pictures arecompared with each other. An assessment ismade of whether it is a question of full picturesin Cinema Scope format. The CCU receivesthis information via the microprocessor for theAutomatic Movie Detection (AMD). Themovement detector is also responsible for thesetting of the noise suppression K factor.In addition, using the movement from the previousto the current half picture an assessmentis made of how the movement betweenthe two half pictures could behave. In thisway, in the movement compensation stageimmediately following a new half picture canbe calculated. At the same time it must betaken into account that the two half pictures,contain the intermediate lines for the other halfpicture respectively. In this way a continuousprocess of movement over all half pictures isachieved, both for horizontal as well as verticalmovements. The DMI (Digital Moving Interpolation)function is active for both full picturepresentation and for standard video signals.The operation of this switch is largely errorfree. Nevertheless, under unfavourable conditionsnegative effects can occur, therefore theDMI function can be switched off. Instead, theDLC (Digital Lineflicker Control) function isswitched on.4.5.4 Memory controlControl of the SAA 4993 is implemented viathe µP interface from I 2311. The µP bus isassigned to pins 26 (DA) and 27 (Cl). In additionit is here in conjunction with the MemoryController that writing to the 2nd picture memoryand reading from the two memories is determined.4.6 SAA 4979 (BESIC)The next IC in the signal path, the SAA 4974,is designed for the following functions.- Demultiplexer for luminance/chroma separation- 3.5Mbit memory for 50/100Hz conversion- Cycle rate converter from 27MHz to32MHZ− Two signal paths for the separate processingof the Y and chroma signals− Demultiplexer for the chroma signals− Band width doubling and digital CTI circuitfor improved colour transfer− Peaking circuit Y branch to increase picturesharpness− Three blank stages for dark sampling− Three 10 bit DACs for the generation ofanalogue R-Y-, B-Y- and Y-signals,I²C bus interface and timing control for thecontrol of the individual processes throughthe microprocessor.− Microprocessor bus for the control of theSAA 4993.− Control of write and read processes in thehalf picture memory, as well as the totaldigital 100 Hz video signal processing.− Generation of a 32 MHz cycle.− Generation of H and V synchronous pulsesfor the TDA9332 video/deflection processor.Document Q 2500 99 © Loewe ProCollege