Technology of Q 2500 colour TV set

Technology of Q 2500 colour TV set Technology of Q 2500 colour TV set

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Technology of Q 2500 colour TV setBlock diagram, VPC 3230 input interfaceAGC+6/-4,5 dBChroma72ClampADCDigital CVBSor Y signalCVBS/YAV3/Synch on Y7374InputmultiplexerAmplificationH-Synch/VGA75ClampADCdigital ChromaSystem ClockI 2271VPC 3230ReferencegenerationFrequencyDVCO150ppm78 59 62 63C 473/48920,25 MHzU5SBThe chroma signal is clamped to its middlevalue. The following automatic amplifier controlin the FBAS/Y path has a control range of-4.5 dB to +6 dB and ensures that even fordifferent input levels the FBAS/Y signal is alwaysoptimally adapted to the ADC. In thechroma branch a fixed amplification is sufficient.The FBAS/Y signal, as also the chroma signalfor Y/C operation are digitised at a cycle rateof 20.25 MHz. The resolution of the two ADCsis 8-bit. Therefore, at the output of the inputinterface there is an 8-bit wide FBAS or Y datastream and for Y/C operation also an 8 bitwide chroma data stream. Both ADCs need acorresponding reference value. This is producedinternally in the reference generationand stored externally on pin 78 by C 488/489.4.3.2 20.25 MHz clock generatorThe frequency determining 20.25 MHz QuarzX 2283 is connected to pin 62/63 of VPC3230. The clock generator is controlled fromthe synchronisation block. In normal operationthe clock generator is line frequency coupled.In the VCR mode, the line frequency couplingis switched off.Document Q 2500 86 © Loewe ProCollege

Technology of Q 2500 colour TV set255CVBS/YChroma217192If the colour carrier is in one of these energygaps, then all sideband frequencies are in thegap as well. For this the picture and colourcarrier frequencies must be firmly coupled.The product of these two frequencies is anoverlapping frequency. The sine waves causelight and dark pixels on the screen, whichhave a fixed position from line to line, so thaton the screen these form a vertically placedlight-dark pattern. The higher the colour carwhite2281928-bit resolution128VideoClamplevel128Burst100%Chroma75%Chroma6832black=Klemmpegelsych.8032A/D changer area for CVBS/Y and Chroma signal4.3.3 Comb filterIn this area of VPC the normally unavoidableCross Colour and Cross Luminance interferencesin the PAL system are eliminated.In addition, the use of a comb filter even forcolour transmissions permits the full 5 MHz Yresolution to be achieved. Without a combfilter it would be limited to approx. 3.8 MHz bythe chroma trap, which would otherwise berequired.This function can be switched off, as it is thecase that for all receiver-side circuits for pictureimprovement, even using a comb filter,there are some rare picture presentationswhich are not good. Switching off is implementedautomatically via the analysis circuit.As this has error-free functioning, the userdoes not need to worry about switching off.• Function of a comb filterLet us consider the transfer method of thePAL signal. The brightness information determinesthat the full video bandwidth is not occupiedfor all frequencies, but only in specificareas. The colour information is inserted intothese energy gaps.BTFTDocument Q 2500 87 © Loewe ProCollege

<strong>Technology</strong> <strong>of</strong> Q <strong>2500</strong> <strong>colour</strong> <strong>TV</strong> <strong>set</strong>Block diagram, VPC 3230 input interfaceAGC+6/-4,5 dBChroma72ClampADCDigital CVBSor Y signalCVBS/YAV3/Synch on Y7374InputmultiplexerAmplificationH-Synch/VGA75ClampADCdigital ChromaSystem ClockI 2271VPC 3230ReferencegenerationFrequencyDVCO150ppm78 59 62 63C 473/48920,25 MHzU5SBThe chroma signal is clamped to its middlevalue. The following automatic amplifier controlin the FBAS/Y path has a control range <strong>of</strong>-4.5 dB to +6 dB and ensures that even fordifferent input levels the FBAS/Y signal is alwaysoptimally adapted to the ADC. In thechroma branch a fixed amplification is sufficient.The FBAS/Y signal, as also the chroma signalfor Y/C operation are digitised at a cycle rate<strong>of</strong> 20.25 MHz. The resolution <strong>of</strong> the two ADCsis 8-bit. Therefore, at the output <strong>of</strong> the inputinterface there is an 8-bit wide FBAS or Y datastream and for Y/C operation also an 8 bitwide chroma data stream. Both ADCs need acorresponding reference value. This is producedinternally in the reference generationand stored externally on pin 78 by C 488/489.4.3.2 20.25 MHz clock generatorThe frequency determining 20.25 MHz QuarzX 2283 is connected to pin 62/63 <strong>of</strong> VPC3230. The clock generator is controlled fromthe synchronisation block. In normal operationthe clock generator is line frequency coupled.In the VCR mode, the line frequency couplingis switched <strong>of</strong>f.Document Q <strong>2500</strong> 86 © Loewe ProCollege

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