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Technology of Q 2500 colour TV set

Technology of Q 2500 colour TV set

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<strong>Technology</strong> <strong>of</strong> Q <strong>2500</strong> <strong>colour</strong> <strong>TV</strong> <strong>set</strong>Q <strong>2500</strong>/H bus systems(only with DVB)SDRAM64Mbit-H16Mbit-B/MControlV24 serviceinterfacePicture 4 - 10SoundMSP 341124 C256(EAROM 2)I2C- Bus 024 C 64(EAROM 1)27 V 322/160(Operating s<strong>of</strong>tware)CCUSDA 6000V24 RXD/TXDI2C-Bus 2(optional)DVBModule8 pinOnlineModule(optional)(only with PIP)PIP-VideoVPC 3233Video Comb.FilterVPC 3230VideoswitchTEA 6415I2C-Bus 1I2C-BusDVBSAT-/Twin-SATunitVideo/deflec.prozessorTDA 9332ChromaswitchTEA 6415(only with PIP)PIPHF/ZFFALCONICSAA 4993µP-BUSBESICSAA 4979AudioswitchTEA 6420AudioswitchTEA 6422HF/ZF(Hyperband-Tuner)4.2.1 I²C bus systemsThe I²C bus is a two-wire bus system consisting<strong>of</strong> a DATA line and a clock line. This bussystem permits the serial and bi-directionalexchange <strong>of</strong> communication between severalmicroprocessors and peripheral ICs that possessan I²C bus interface. This means that thenumber <strong>of</strong> connections is reduced, which resultsin a simplified switching structure, andincreased reliability (fewer solder points, connections,contacts, etc.).Via pull-up resistors, both lines are in a state<strong>of</strong> rest (i.e. no data transfer) at H level. Datatransfer starts if a clock line is "High" and anegative flank (H > L) appears on the DATAline (Start condition). Evaluation <strong>of</strong> the dataoccurs during the H level <strong>of</strong> the clock pulse.Data inputs/outputs in I2C busData inData outP 14k7P 2Data inData out+5VDocument Q <strong>2500</strong> 73 © Loewe ProCollege

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