Technology of Q 2500 colour TV set

Technology of Q 2500 colour TV setWith this module the PIP function can be usedwith our devices. Split screen and Multi PIPare not used.This processor does not form part of the digitalsignal processing. As you can see from thecircuit diagram, the RGB signals from SDA9488 pins 15/16 and 17 are fed directly toTDA 9332 (pins 30/31/32).SDA 9488 receives the FBAS or Y/C signal tobe processed on pins 26/28 from the videoconversionIC.The necessary 100 Hz V/H synchronous signalsare fed to pins 4 and 3.For our medium devices as for our high varianta VGA interface can be retro-fitted. TheVGA RGB signals are not, however, fed directlyinto the TDA 9332, as in the high-enddevice, but for VGA operation are loopedthrough the SDA 9488 to the TDA 9332.From the VGA interface the RGB signals areled to pins 11/12 and 13 of SDA 9488.4.9 Video/deflection controllerTDA9332 (deflection area)The Philips TDA 9332 video/deflection controllercan be used in standard TV’s as well as indevices with double picture and line frequency.The video/deflection controller is switched inthe Q 2500 chassis in such a way that it candrive the H/V deflection with double the frequency.4.9.1 Clock generation/Phase 2 loopAll the necessary cycle and synchronous signalsnecessary for internal signal processingare derived from this block.The synchronous signals generated by SAA4979 are fed to pin 24 (H synchronous signal)and to pin 23 (V synchronous signal) of thecontroller. The cycle frequency for the video/deflection processor is produced with an external12 MHz quartz on pins 20 and 21. Thiscycle is synchronised by a PLL that operateswith the horizontal synchronous pulse HA.4.9.2 DAC for OW/V controland H output stageThe DACs for the two vertical -VD+ controlsignals contain all vertical correction information.The VD+ control signals are output topins 1/2 and are fed via R 1032 and R 1033 topins 2/3 of W 1511. In this way the V outputstage on the basic board is controlled by d.c.The vertical frequency E/W parabola also containsall correction information. The controlsignal is output by I 2521 on pin 3 and is fedvia W 1511 pin 6 to the basic board. In thisway the E/W output stage on the basic boardis controlled.The horizontal output is programmed in sucha way that on pin 8 a rectangular signal with13 µs H and 19 µs L level for control of the H-output stage on the basic board is output. Thesignal reaches Q 2556 and Q 2561 on pin 13of pin connector W 1511 via two inverterstages and controls H output stage Q 534 onthe basic board via H driver stage Q 526.In the SAT standby, for SAT radio and foroverwriting in standby, the c.r.t. must beswitched off. For this the horizontal pulse isswitched off via transistor Q 2951. The controlof Q 2951 is implemented via pin 79 of theSDA 6000 microprocessor. The c.r.t. isswitched off here with H level.4.9.3 Beam current dependent correctionthe vertical/horizontalamplitude and the H phaseAs we know the high voltage at the anodeconnection of the c.r.t diminishes at highbeam currents, owing to the internal resistanceof the high voltage generation. Thelower high voltage means that the beam ofelectrons is not so strongly accelerated andcan be deflected outwards again by the V/Hmagnetic deflection fields. The picture becomeslarger.If the beam current decreases (darker picturecontent) the picture becomes smaller again.Appropriate corrective measures are neces-Document Q 2500 108 © Loewe ProCollege