Technology of Q 2500 colour TV set
Technology of Q 2500 colour TV set Technology of Q 2500 colour TV set
Technology of Q 2500 colour TV setVPC 3233 /I 2151 and the PIP memory I2161/71 The video processor PIP is the sameIC type as the main video processor I 2271.With the VPC 3233 various PIP representationsare possible. Our device controls support3 PIP representations.Split ScreenThe screen is split into two halves. On the leftside the half picture is displayed and on theright side the picture of the PIP electronics.Both pictures are the same size and quality. Inthe horizontal level, sections of a picture onthe left and right are naturally cut off. The corearea, however, is correctly displayed.PIP smallThe picture in picture, which is reduced to 1/9of its normal size, can be positioned in any ofthe four corners.PIP largeThe same is true as for PIP small, only thesize is 1/4 of the normal picture.For 4:3 devices Split Screen is not possible.For small and large PIP display the PIP picturemust be correspondingly compressed.This occurs at the vertical level by the interpolationof picture lines. For the small setting, 3lines are compressed and for large setting 2lines, and for each a new line is calculated byinterpolation. In the horizontal level these linesare then compressed accordingly. The writingof the picture in picture data to the PIP memoryis controlled completely by the PIP-VPC.Reading from memory is controlled fully fromthe main VPC.Writing to and reading from memory is thereforeindependent. There is no synchronisationbetween the two VPC’s.The PIP processor processes FBAS as wellas Y/C signals. The video transfer applies theFBAS/Y signal to pin 73 and the associatedchroma signal to pin 72. All possible signalsources can therefore be displayed as PIP.If an online module is integrated into the TVset, the picture can also be displayed by theonline module as PIP. The Y/C signal from theonline module reaches the pin connector W1531 on the signal board. The TVO/Y signal isapplied to pin 74, and the associated chromasignal to pin 71 of I 2151.For the basic and medium signal board variantsa single chip PIP processor SDA 9488 isused.Document Q 2500 106 © Loewe ProCollege
Technology of Q 2500 colour TV setSDA 9488x / PiP-ProzessorQ2500M/BTripleDACRGBMatrixPeakingOversamplingInsertionDEMUXMUXIN1IN2VDDA2VSSA2VDD VSSVDDA1 VSSA122 23 19 20Skewcomp.H/V ScalerDecimationTRIPLEADC3x 8bit 1)3x7bit11eDRAM12FrameGenerationIN3FSWOUT1OUT2OUT3SELDUV/DCHRDCVBS/DY1314512kbitColorDecoderPAL/ SECAM/ NTSCFastRGB/YUVSwitchInputSelectClampGainDisplayControllerMemoryControllerInsetSyncProcessingY/C andSyncSep.VREFHVREFMVREFLParentSyncProcessingClockSynthesizerData SlicerAcquisitionControllerCVBS1CVBS2CVBS32710SCL SDA I2CINTRXIN XQ HSP VSPXTAL20.25 MHz212528262418171615Document Q 2500 107 © Loewe ProCollege
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<strong>Technology</strong> <strong>of</strong> Q <strong>2500</strong> <strong>colour</strong> <strong>TV</strong> <strong>set</strong>VPC 3233 /I 2151 and the PIP memory I2161/71 The video processor PIP is the sameIC type as the main video processor I 2271.With the VPC 3233 various PIP representationsare possible. Our device controls support3 PIP representations.Split ScreenThe screen is split into two halves. On the leftside the half picture is displayed and on theright side the picture <strong>of</strong> the PIP electronics.Both pictures are the same size and quality. Inthe horizontal level, sections <strong>of</strong> a picture onthe left and right are naturally cut <strong>of</strong>f. The corearea, however, is correctly displayed.PIP smallThe picture in picture, which is reduced to 1/9<strong>of</strong> its normal size, can be positioned in any <strong>of</strong>the four corners.PIP largeThe same is true as for PIP small, only thesize is 1/4 <strong>of</strong> the normal picture.For 4:3 devices Split Screen is not possible.For small and large PIP display the PIP picturemust be correspondingly compressed.This occurs at the vertical level by the interpolation<strong>of</strong> picture lines. For the small <strong>set</strong>ting, 3lines are compressed and for large <strong>set</strong>ting 2lines, and for each a new line is calculated byinterpolation. In the horizontal level these linesare then compressed accordingly. The writing<strong>of</strong> the picture in picture data to the PIP memoryis controlled completely by the PIP-VPC.Reading from memory is controlled fully fromthe main VPC.Writing to and reading from memory is thereforeindependent. There is no synchronisationbetween the two VPC’s.The PIP processor processes FBAS as wellas Y/C signals. The video transfer applies theFBAS/Y signal to pin 73 and the associatedchroma signal to pin 72. All possible signalsources can therefore be displayed as PIP.If an online module is integrated into the <strong>TV</strong><strong>set</strong>, the picture can also be displayed by theonline module as PIP. The Y/C signal from theonline module reaches the pin connector W1531 on the signal board. The <strong>TV</strong>O/Y signal isapplied to pin 74, and the associated chromasignal to pin 71 <strong>of</strong> I 2151.For the basic and medium signal board variantsa single chip PIP processor SDA 9488 isused.Document Q <strong>2500</strong> 106 © Loewe ProCollege